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CPU Reset 后的前100多条指令. R3 e1 i+ B. N# V9 \0 `' `4 P( i
测试平台: Intel Menlow Crown Bench CRB
- `3 r3 W! ~; W- TBIOS: 自带的 AMI BIOS
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Below is the instruction and registers when CPU reset
3 M5 I I8 ]$ H; M$ @F000:0000FFF0 EAAAFF00F0 JMP far16 ptr f000:0000ffaa4 t: g* w) Q: r) e- `& x
EAX = 00000000: AX=0000 AH=00 AL=00
3 E" B' @# {- UEBX = 00000000: BX=0000 BH=00 BL=00
Z- @4 ]5 T( y7 eECX = 00000000: CX=0000 CH=00 CL=00
2 d% s/ z! C' Q+ U" gEDX = 000106C0: DX=06C0 DH=06 DL=C0 - ~* Y- R6 `1 k$ C$ {. L7 E2 \! {
EBP = 00000000: BP=0000
9 E8 z& `& Y! M' o. uESI = 00000000: SI=0000
% s9 c" e, B/ BEDI = 00000000: DI=0000 7 D( t4 K+ n6 K: j4 j) G9 M6 t
ESP = 00000000: SP=0000
# r- G! [6 g9 Y, bCS = F000
6 P* J+ j- }/ n# B: @; sDS = 0000
! h; i! {2 m+ v# P+ N0 @SS = 0000
* l9 [# S0 H# S& k) u6 f9 Y% v! GES = 0000
) }8 I! Y1 T& O9 QFS = 0000- g/ u M+ h; l/ K
GS = 0000/ m. d( y. _1 O' z8 n/ [
EIP = 0000FFF0: IP=FFF0
! N' A- D- W7 P5 gEFLAGS = 00000002: FLAGS=0002 ID=0 VIP=0 VIF=0 AC=0 VM=0 RF=0 NT=0 IOPL=0 OF=0 DF=0 INF=0 TF=0 SF=0 ZF=0 AF=0 PF=0 CF=0
- Z* c3 B' T9 ^$ T+ `CR0 = 60000010: PG=0 CD=1 NW=1 AM=0 WP=0 NE=0 ET=1 TS=0 EM=0 MP=0 PE=0 ' u" }. D" j) h( J; M/ p/ ^5 J
CR2 = 00000000
, [# Q2 D& B2 Y; JCR3 = 00000000: PCD=0 PWT=0
& t! n- R5 ]( U6 T0 KCR4 = 00000000: VMXE=0 OSXMMEXCPT=0 OSFXSR=0 PCE=0 PGE=0 MCE=0 PSE=0 PAE=0 DE=0 TSD=0 PVI=0 VME=0 ( x* b" |3 I" Y' t
6 p& ~9 M* O5 i) O6 s! L" _Instruction for CPU step 00
- w! ]: u2 w3 S. l3 v. y( q( iF000:FFAA E9C300 JMP near16 ptr 0070
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Instruction for CPU step 01
2 m; J u+ t) cF000:0070 E9FD01 JMP near16 ptr 0270* E6 A5 p# C- ?1 }" K# R
+ [- a& S, _2 A P7 n( J% u& AInstruction for CPU step 025 k. R0 m% L u2 p D
F000:0270 FA CLI & o8 I2 P& A# v$ e& `
, `5 ] ^) p: T' V4 s. YInstruction for CPU step 03
+ n( \& ?( A9 C$ }6 y. c1 IF000:0271 FC CLD
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1 O5 c7 n. q' F# q0 uInstruction for CPU step 04) Z h/ j# z2 G( S
F000:0272 668BE0 MOV ESP,EAX 8 K2 O" A* {' N1 l/ O1 w7 q
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Instruction for CPU step 05
" s- {! C8 Y* W7 [F000:0275 8CC8 MOV AX,CS D; J- E, A; W* m1 C: ]
! x* p) T/ Y- B7 v9 V- xInstruction for CPU step 06
1 N8 j K) m# P1 c8 OF000:0277 8ED0 MOV SS,AX
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Instruction for CPU step 074 _# u6 n& g/ B8 F
F000:027C E957FE JMP near16 ptr 00d6
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Instruction for CPU step 086 w# g* z" D0 P5 x( [
F000:00D6 E9A601 JMP near16 ptr 027f( [+ |- d/ E2 l1 ~
6 b3 A; K, j3 O0 rInstruction for CPU step 09) S$ a# |( X* Y# n
F000:027F B0D0 MOV AL,d0
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Instruction for CPU step 10: c% \. e l& d6 m
F000:0281 E680 OUT 80,AL
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Instruction for CPU step 11) z6 ^; _/ g$ D1 F. n* F, w
F000:0283 BF8902 MOV DI,0289
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Instruction for CPU step 12
7 N( s1 a9 n5 U) n9 J2 ~. F7 ^F000:0286 E9AE06 JMP near16 ptr 0937
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) u, A" Z0 b/ p5 FInstruction for CPU step 13) q7 K0 T4 w" i x* i
F000:0937 0F08 INVD ) V, n @1 I% ?* z/ t
, m2 @2 N. F: a+ P, q1 ZInstruction for CPU step 14. n R2 P" D8 Z- o c: a) P
F000:0939 0F6EFF MOVD MM7,EDI / G1 i: z5 ~* D
8 _; L/ V! X6 e& h8 ~* `Instruction for CPU step 155 ?" \" _& N/ v( m* C3 H, J
F000:093C 668BC4 MOV EAX,ESP
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Instruction for CPU step 16
0 b* l& H! i! n! v6 P7 E% r2 IF000:093F E97C08 JMP near16 ptr 11be- l: o2 x7 `) X P b% _, F! h9 |
: h4 V5 h1 P) s* ]& h0 F1 lInstruction for CPU step 17
3 u. B m8 I# Y0 PF000:11BE E981F7 JMP near16 ptr 0942) ]7 U5 E/ A6 G+ d5 i
% @8 U8 U. O) |% WInstruction for CPU step 18( b ], |5 z: i4 }* g0 k( T9 d
F000:0942 BF4809 MOV DI,0948 " o$ E* w# {! f+ f
/ h1 {# L4 v8 H+ u1 aInstruction for CPU step 192 u) v2 {9 U9 ^: [4 M5 \
F000:0945 E9C004 JMP near16 ptr 0e08
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' a& U1 ]/ C& Y# ?/ D. |Instruction for CPU step 20/ c% a" A# q' }0 l2 Z- `) R
F000:0E08 0F20C0 MOV EAX,CR0 C/ a' P9 L7 Z
" d+ t4 v$ Q$ B5 o1 XInstruction for CPU step 21
5 q( j) j7 G; B8 @1 xF000:0E0B 660D00000060 OR EAX,60000000% M+ m. y$ s& M2 X
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Instruction for CPU step 22
3 c+ j3 j3 I# z1 k8 Q: F. N1 GF000:0E11 0F22C0 MOV CR0,EAX - p" L T% M/ o8 N# k* f
3 |4 F- C4 u2 R& s
Instruction for CPU step 23. Z" @# M; Q% b @2 b7 c
F000:0E14 0F09 WBINVD ' ?% L# g3 ` z% f& ^( ^4 {
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Instruction for CPU step 24: Z( }/ O }, Y) w
F000:0E16 66B9FF020000 MOV ECX,000002ff1 K1 f0 _. v" L& c8 f2 N
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Instruction for CPU step 25
d6 ?+ s) }2 | w8 `$ HF000:0E1C 0F32 RDMSR
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Instruction for CPU step 26
\8 c& S% }$ j0 O ^8 MF000:0E1E 25FFF3 AND AX,f3ff
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' }& l) A% [* ]# `4 }6 ^Instruction for CPU step 27
4 D' I: s" G: F' `& {1 F: B/ gF000:0E21 0F30 WRMSR # b+ i, P) R: b6 s
3 z# a& _* d) p; nInstruction for CPU step 282 Y7 ]* [7 b4 G
F000:0E23 0F09 WBINVD + |) E& ]6 v' {6 b
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Instruction for CPU step 29/ _" Z$ F% V* o( `( F+ H9 v
F000:0E25 0F20E0 MOV EAX,CR4
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Instruction for CPU step 30
% ?3 x5 S& ?. l: FF000:0E28 247F AND AL,7f
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5 n6 h0 {! C: p5 F! {+ i$ kInstruction for CPU step 311 S! X w% W) l1 q
F000:0E2A 0F22E0 MOV CR4,EAX J6 h) @; U2 |. e, B( J
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Instruction for CPU step 328 I* i; e0 z8 B2 R F$ F/ ]: p5 ?
F000:0E2D 0F20D8 MOV EAX,CR3 3 g& l+ z( P5 F- x% G
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Instruction for CPU step 332 L( T# G _8 F5 Q: v/ Z: ^
F000:0E30 0F22D8 MOV CR3,EAX N+ q" `& r% Z* p$ a9 Z
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Instruction for CPU step 34
7 G7 O8 n" o, E' \ F. z! AF000:0E33 FFE7 JMP DI 2 Y- z% n3 T: Y: P
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Instruction for CPU step 35
8 p. p7 J5 F) Z5 XF000:0948 66B9FE000000 MOV ECX,000000fe
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Instruction for CPU step 36
9 M, M5 K' [- f" f2 C+ tF000:094E 0F32 RDMSR
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: U% B0 m/ s0 A2 X- F$ bInstruction for CPU step 37' o3 K* B3 ?9 Y, R4 b$ z
F000:0950 0FB6D8 MOVZX BX,AL ) o9 L. d: [) o# S- X
0 n. r: @5 g' y9 B. ]0 M5 f# gInstruction for CPU step 382 A5 h# N" n" Y( b
F000:0953 6633C0 XOR EAX,EAX Y" \) N' F) z- U
1 U5 o: }8 Z0 q6 h6 h( fInstruction for CPU step 398 ~. s; |/ E' p" b; o
F000:0956 668BD0 MOV EDX,EAX " ?0 t2 q2 ^, y. |' s
( i, G4 G% }# I* p( Q& v& a5 _; b5 k9 ^Instruction for CPU step 40
) O. C" w" j; R9 M8 Z" i6 g; V8 Y- aF000:0959 B95002 MOV CX,0250
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4 h; |& n- q, \$ `# _Instruction for CPU step 41
1 E" r% t4 ~1 \& JF000:095C 0F30 WRMSR
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8 C& D8 E( a4 F4 n7 _" V4 B' GInstruction for CPU step 42
, O& l% i: v( _) M* }7 `F000:095E B95802 MOV CX,0258
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Instruction for CPU step 43) x" D2 F; R/ y4 X
F000:0961 0F30 WRMSR
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Instruction for CPU step 44 `$ r0 s4 B* A, C
F000:0963 B95902 MOV CX,0259
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Instruction for CPU step 45
0 c% D6 T* [- c% M# FF000:0966 0F30 WRMSR 6 U& f9 g) `+ e0 s9 B: D) V1 I `# r
* N2 q1 A& M! `5 G/ {/ qInstruction for CPU step 46
l7 i8 [6 c1 O8 Z: oF000:0968 B96802 MOV CX,0268 , k( o6 w1 t3 h1 H4 P
& a, p% ~4 T+ G& P* sInstruction for CPU step 47- ]# h4 p" v6 c+ A+ U: C$ {$ [
F000:096B 0F30 WRMSR
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6 E3 W* w/ \$ G1 R) K/ U( r/ nInstruction for CPU step 48" \; Q1 K. X; Y/ u. }
F000:096D B96902 MOV CX,0269 - `& `( T3 `. q0 h
; M7 J8 r! Y9 M2 G6 A6 tInstruction for CPU step 49
- k/ e7 ]' K" E% y* f( [ RF000:0970 0F30 WRMSR 8 P$ n" o, k. a! V- N. ~6 S
" V R% ?2 {9 | l# I0 UInstruction for CPU step 503 ]5 n/ b! t }0 [7 e5 m0 g
F000:0972 B96A02 MOV CX,026a 0 }; y3 v) J5 q' U) U5 ?, x$ j
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Instruction for CPU step 51/ G& ]! {0 m1 H' x
F000:0975 0F30 WRMSR
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' i9 N0 A, O+ U* h6 p5 I9 ^Instruction for CPU step 52' E2 {# e. A7 m Q! Y9 s
F000:0977 B96B02 MOV CX,026b ) U( ?+ |+ {. p0 ^0 S& X7 U% V; @
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Instruction for CPU step 53
$ D) U6 L5 N' d9 p TF000:097A 0F30 WRMSR : ]" _6 e. o. G# y% t2 a! h0 |7 I
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Instruction for CPU step 540 I' N5 g3 r7 j0 }
F000:097C B96C02 MOV CX,026c 0 N. w; c( B4 g' J/ n7 w3 H
4 T: J' l, Q5 j3 q$ M( D6 V' NInstruction for CPU step 558 S2 r0 v u( g* P& z$ y
F000:097F 0F30 WRMSR
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Instruction for CPU step 56$ K+ O/ t$ L- z& c9 _
F000:0981 B96D02 MOV CX,026d 8 W2 i0 W9 C6 L! R5 u8 j ~
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Instruction for CPU step 57) E- _/ O) H+ V' T7 E e
F000:0984 0F30 WRMSR & a. W8 I6 a( }* m( _+ A5 k
+ Z5 h+ ~) G; j+ L0 S/ L" nInstruction for CPU step 58
' a3 S8 u) b5 T3 Y8 hF000:0986 B96E02 MOV CX,026e # o3 d% ]2 [4 T+ W5 b0 _" y
( M, X; C1 O( f0 z# H! J* L, wInstruction for CPU step 59, ^, I: U2 U% {/ m' Y
F000:0989 0F30 WRMSR + u' J- c% O! i: {& R! V7 l. a
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Instruction for CPU step 60
2 Y, a- C9 p) mF000:098B B96F02 MOV CX,026f 8 e; H: t. D' T5 X" D
+ R4 a8 d/ @8 F2 W: z" i) P4 `Instruction for CPU step 61
) K4 s& M7 O6 R3 A& ^- `F000:098E 0F30 WRMSR
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Instruction for CPU step 62
5 y. W' I3 D/ d: V% V$ gF000:0990 D1E3 SAL BX,1 8 U# Z9 B- @! a3 N8 @- d
3 ]9 T2 F' b/ C' iInstruction for CPU step 63
+ n2 e S9 X1 t4 A, bF000:0992 B90002 MOV CX,0200
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! H* s9 }, y9 ]( P' t, E4 h( }+ [8 xInstruction for CPU step 64
5 P% c# }8 u$ A, Q0 l5 q7 ]% Y6 b. TF000:0995 4B DEC BX
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( d% _: S) g: b2 A6 x4 d0 B9 ?Instruction for CPU step 65/ v( p$ I- u7 z# L( K9 {* ^
F000:0996 0F30 WRMSR 1 ~+ x% _6 _6 S
3 r: ]9 I. H6 b5 N" tInstruction for CPU step 66
( M" j. O9 ]( O" R- x( D r( uF000:0998 41 INC CX + Y9 W- L) g7 o
9 `) I9 y" D) j( B. u* bInstruction for CPU step 67; n( D6 z0 b4 \0 r+ v" u6 _/ {+ S
F000:0999 0BDB OR BX,BX
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Instruction for CPU step 68
; c# ]+ l2 m4 }/ V' MF000:099B 75F8 JNE short ptr 0995
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Instruction for CPU step 69
q9 Z3 t3 t8 h7 l. q2 N$ m5 ]F000:0995 4B DEC BX
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Instruction for CPU step 70
: i; y: s# ~$ S& R, [9 ^4 G5 ]F000:0996 0F30 WRMSR
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5 }9 r6 a& @$ _& [, O: eInstruction for CPU step 71
' U( I+ k" H$ k* c' dF000:0998 41 INC CX 6 u. L5 J G9 Q }1 L1 l
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Instruction for CPU step 72
Y) V% S' D& t* |/ r$ K6 s$ aF000:0999 0BDB OR BX,BX
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Instruction for CPU step 730 p. O7 G7 p5 ?3 ?$ n
F000:099B 75F8 JNE short ptr 0995- N" X% G0 n2 g% U, j. \% }2 |
0 A- G7 M% s8 \. H. j( M! @2 p0 KInstruction for CPU step 74
# B2 J6 o3 Y/ B0 [5 V3 ]- O5 E9 EF000:0995 4B DEC BX
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Instruction for CPU step 75. t: ]/ V% g9 W. b/ b
F000:0996 0F30 WRMSR
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1 X5 Q/ a: C$ zInstruction for CPU step 76% D$ x# L, i! q6 l* M. ?
F000:0998 41 INC CX , q5 s4 n: t: N8 K$ t4 W
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Instruction for CPU step 77
4 k% Y# V1 O v7 `6 v/ gF000:0999 0BDB OR BX,BX ' Q: f1 \3 }! O
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Instruction for CPU step 78
* `- |; \7 j7 v2 qF000:099B 75F8 JNE short ptr 0995
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8 _1 P0 z8 F* ^0 X8 OInstruction for CPU step 79
: r6 A5 ?/ R. O: wF000:0995 4B DEC BX
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3 e, j+ |8 n& _% {6 T$ {1 |' u. \" gInstruction for CPU step 80* J- Q3 _3 W3 D- l. U
F000:0996 0F30 WRMSR
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4 i2 _ |$ m+ y! AInstruction for CPU step 81
! H( ?5 M6 b' G( SF000:0998 41 INC CX " d8 I6 p8 w6 Q4 f) A2 O
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Instruction for CPU step 82) m& ]9 }/ y& Z: P+ J% L- z6 Z" {* p
F000:0999 0BDB OR BX,BX
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Instruction for CPU step 83
4 ^% k- j: i* M+ hF000:099B 75F8 JNE short ptr 0995
4 [/ B0 E/ K5 `4 ~- R9 N( r6 W 7 ]( ]& A N; i9 ~* _
Instruction for CPU step 842 K! T# M/ H# m6 N
F000:0995 4B DEC BX ( L( W0 E. w: }) E, h2 n! k2 q
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Instruction for CPU step 85
- m2 v- @) i. GF000:0996 0F30 WRMSR
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; T! [3 Q! \- mInstruction for CPU step 866 K) k; h0 W0 f& F8 V
F000:0998 41 INC CX . T- F& ?4 {6 W
% ]/ D. \" L6 F2 k" k3 ]7 oInstruction for CPU step 876 u: r+ p; p* j* D
F000:0999 0BDB OR BX,BX
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Instruction for CPU step 88% p2 Q/ n% ~' C( H1 F. y
F000:099B 75F8 JNE short ptr 09951 g, z9 x- T2 G R
( k0 q" ~# i% B0 I0 o9 v- Z" ZInstruction for CPU step 89
) {, q1 M% Y9 E7 L) n' RF000:0995 4B DEC BX
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/ \3 Z0 \% C! Q. W- AInstruction for CPU step 90
' F" P& t" K+ B+ C+ W" \F000:0996 0F30 WRMSR
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Instruction for CPU step 917 |, S9 v, V2 R( J
F000:0998 41 INC CX
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Instruction for CPU step 92/ v* s; i+ C2 Y# G. R& A" k! t1 b4 p9 A
F000:0999 0BDB OR BX,BX
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Instruction for CPU step 936 ]9 N+ V. ^. D9 I& p: l; ]
F000:099B 75F8 JNE short ptr 0995
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& I. z1 b2 }1 a B# m3 b& _3 NInstruction for CPU step 94
# F3 D% j6 l- V; x" p7 W$ VF000:0995 4B DEC BX
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Instruction for CPU step 95
* ~. w8 a% K' |5 HF000:0996 0F30 WRMSR
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Instruction for CPU step 96
" q+ T4 ~5 [( M* Z2 NF000:0998 41 INC CX
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Instruction for CPU step 97' N8 I* Q9 C+ p9 a
F000:0999 0BDB OR BX,BX
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Instruction for CPU step 98# y; ^$ d) j/ U8 }; R& g; V, ^
F000:099B 75F8 JNE short ptr 0995; X% s. ~, g6 m$ Q/ W
) m, [5 H8 h7 q8 M; C5 g# p( pInstruction for CPU step 996 Y2 K/ b2 N6 `1 M, s+ R
F000:0995 4B DEC BX 9 ]9 G5 I+ v* T& {: A7 O3 _% ~* @
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Instruction for CPU step 100/ R3 ?4 \$ d- l& U5 d; F' R
F000:0996 0F30 WRMSR * B5 |3 r; W+ j3 ~9 `* S
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Instruction for CPU step 101& S; r0 n- B% Q0 l m; F, e
F000:0998 41 INC CX
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+ m& N6 R/ u4 J$ a* S" bInstruction for CPU step 102; a3 @/ T/ C, d2 \) b7 V
F000:0999 0BDB OR BX,BX
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Instruction for CPU step 103; F% n% _: K" D
F000:099B 75F8 JNE short ptr 0995& P* G! `6 }3 S
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Instruction for CPU step 104
* k O# ?2 v1 u( W P& sF000:0995 4B DEC BX |
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