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CPU Reset 后的前100多条指令
3 B9 x) X1 U- \& ]测试平台: Intel Menlow Crown Bench CRB4 P8 _! [6 [* L+ u0 F+ Z0 W5 D
BIOS: 自带的 AMI BIOS
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Below is the instruction and registers when CPU reset
! ^. a8 n; N9 N1 N' {F000:0000FFF0 EAAAFF00F0 JMP far16 ptr f000:0000ffaa
. b, _9 E' d, c% ^1 r' BEAX = 00000000: AX=0000 AH=00 AL=00
& y1 c0 _+ M9 ?" I8 V7 \" j# gEBX = 00000000: BX=0000 BH=00 BL=00 : C, K( z& e2 S# k
ECX = 00000000: CX=0000 CH=00 CL=00 ; G2 {7 q8 G+ ?6 W( X
EDX = 000106C0: DX=06C0 DH=06 DL=C0 ' s0 \9 \+ a( p4 W5 r- ~ Y
EBP = 00000000: BP=0000
1 w$ y* C( @8 Z" j# O; qESI = 00000000: SI=0000 : ~( d2 e2 J8 Z
EDI = 00000000: DI=0000 + P0 Y& W7 d9 c6 t
ESP = 00000000: SP=0000
' I/ W6 W" [1 w. JCS = F000
) Y K+ j7 W3 DDS = 0000
% J1 I6 E/ R0 j4 rSS = 0000
! h8 N2 ]% O$ o5 hES = 0000% ?% L: Z) Z/ }6 w
FS = 0000
' A" {" s* u6 s8 Y$ kGS = 0000
, h( D1 r/ |- V8 }- AEIP = 0000FFF0: IP=FFF0
9 ]" B8 l5 {. D4 V. t0 sEFLAGS = 00000002: FLAGS=0002 ID=0 VIP=0 VIF=0 AC=0 VM=0 RF=0 NT=0 IOPL=0 OF=0 DF=0 INF=0 TF=0 SF=0 ZF=0 AF=0 PF=0 CF=0
+ W6 P/ x3 R+ F& E& V# o: A6 UCR0 = 60000010: PG=0 CD=1 NW=1 AM=0 WP=0 NE=0 ET=1 TS=0 EM=0 MP=0 PE=0
1 ?7 b Y; J% J* I1 ^CR2 = 000000003 L1 A: U: e7 T2 C! {2 u9 w
CR3 = 00000000: PCD=0 PWT=0 3 M$ [3 F$ x5 T/ R& h# T
CR4 = 00000000: VMXE=0 OSXMMEXCPT=0 OSFXSR=0 PCE=0 PGE=0 MCE=0 PSE=0 PAE=0 DE=0 TSD=0 PVI=0 VME=0
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+ n- d9 Q; L4 B% ?Instruction for CPU step 00
9 e @2 {" Y/ n/ O+ Q+ q# }+ m) IF000:FFAA E9C300 JMP near16 ptr 0070
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/ l+ A8 V7 }- y8 m% d/ ^8 L k& e, RInstruction for CPU step 01
1 M8 e+ _1 \: `+ p8 I- k7 m- X5 YF000:0070 E9FD01 JMP near16 ptr 0270
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$ e9 @) e1 \. W; W" IInstruction for CPU step 02' K: ]; O6 c; l. @2 q% J, H7 e
F000:0270 FA CLI
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Instruction for CPU step 03
* N [& Y5 X7 u( _F000:0271 FC CLD
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Instruction for CPU step 04
' ]! i) c) Q; C& M% J4 ~F000:0272 668BE0 MOV ESP,EAX
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Instruction for CPU step 05
- r% }- J$ u, ~( O6 f- pF000:0275 8CC8 MOV AX,CS $ F0 A8 |- I! [0 y8 A
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Instruction for CPU step 069 \, b9 r$ L( v; v7 j6 v
F000:0277 8ED0 MOV SS,AX
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9 b( p @6 a5 i% hInstruction for CPU step 07& \" ]3 m6 U1 y* H
F000:027C E957FE JMP near16 ptr 00d6
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Instruction for CPU step 08. ~5 \0 O9 r B) c
F000:00D6 E9A601 JMP near16 ptr 027f
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Instruction for CPU step 09
& Q4 v& z. y9 S: Y. s0 QF000:027F B0D0 MOV AL,d0 4 a9 U% j# t) r! {& l/ e1 t
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Instruction for CPU step 10
) G: h3 Y! l. U; O, d" EF000:0281 E680 OUT 80,AL ( r' M0 C5 \3 Q
0 f/ u* G: p( s& s' SInstruction for CPU step 11: R' K4 C) K8 `5 I9 P5 \" s: G
F000:0283 BF8902 MOV DI,0289
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Instruction for CPU step 123 B8 ~% _/ {) @: i
F000:0286 E9AE06 JMP near16 ptr 0937
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. y* E5 [/ A* K. GInstruction for CPU step 13! {8 G' M& w- D) N# c( \' b! s
F000:0937 0F08 INVD ) P+ r @0 d5 h( J& B! K
: V) M! H" H: ~/ ]Instruction for CPU step 14' a3 @0 V0 k& U/ d4 B; {
F000:0939 0F6EFF MOVD MM7,EDI 9 ?0 g2 @# Q/ O0 ^ E
0 H( M$ l- w, r+ J& z; ^; q- DInstruction for CPU step 15: t% a& K" f7 A% V8 g4 C3 a1 X9 J
F000:093C 668BC4 MOV EAX,ESP + \, J1 D+ q c" C) G& v$ L+ R- { y
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Instruction for CPU step 16
9 ], L4 \3 b1 O, \, r' vF000:093F E97C08 JMP near16 ptr 11be$ z3 g% P3 p, S. Y7 V) k
7 c+ ?: v3 S- n5 qInstruction for CPU step 17
' V8 g6 b% Y! s9 X/ f2 BF000:11BE E981F7 JMP near16 ptr 0942! F# y z7 U. O
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Instruction for CPU step 18
# @- F0 g) |' u* I9 ]$ _F000:0942 BF4809 MOV DI,0948 / h' Z1 R7 L/ @$ {$ B( a
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Instruction for CPU step 19: e K' n; [3 e2 f- x; K
F000:0945 E9C004 JMP near16 ptr 0e08
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+ a9 ?( T8 i8 ~2 @# G' JInstruction for CPU step 20
+ g. c a; P, t/ ]! E ~F000:0E08 0F20C0 MOV EAX,CR0
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7 v) y N) L9 A* X0 U% s, UInstruction for CPU step 21; s6 y. V/ a& d
F000:0E0B 660D00000060 OR EAX,60000000% w: Q2 S1 _ ?, ?5 y$ p: \+ Y
& Z0 [! g; Z# M* m6 |Instruction for CPU step 22/ Y5 F' Q8 I, q& v5 O6 F
F000:0E11 0F22C0 MOV CR0,EAX
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6 ~& m ~' ^) h( JInstruction for CPU step 23
# z7 M" B8 ~3 u T1 D! f# BF000:0E14 0F09 WBINVD + E8 E V& E, y$ b
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Instruction for CPU step 24
6 G$ f* U& l* Y" Y% TF000:0E16 66B9FF020000 MOV ECX,000002ff
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Instruction for CPU step 25
9 D. b: q( G+ P- TF000:0E1C 0F32 RDMSR : Z H- o9 f2 v5 R# e
7 k% O: j/ n0 O1 ] o8 qInstruction for CPU step 26
0 Z# p* v$ v7 C5 x) W0 MF000:0E1E 25FFF3 AND AX,f3ff , t& x6 U. T5 Y6 ]! h# |# H: E
' [; X+ j8 i4 ^7 U6 q% gInstruction for CPU step 27) i# ]4 J! i& `
F000:0E21 0F30 WRMSR
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Instruction for CPU step 28# c% d2 L4 v% M
F000:0E23 0F09 WBINVD ) e, I! |. h+ g; E) m6 g0 b
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Instruction for CPU step 296 W5 Y7 v. W6 u# p" |& o5 N+ Q$ f
F000:0E25 0F20E0 MOV EAX,CR4 ) s+ w0 k f! Z" v
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Instruction for CPU step 30
, S x+ U& i; BF000:0E28 247F AND AL,7f 5 p' U" \2 c7 ?7 Q6 H1 `
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Instruction for CPU step 31
' @7 Z& [( o5 L4 T; tF000:0E2A 0F22E0 MOV CR4,EAX
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+ S8 {2 f! c# IInstruction for CPU step 32$ g6 y( A! k2 a0 }
F000:0E2D 0F20D8 MOV EAX,CR3
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Instruction for CPU step 33
0 z* u: l7 t" D1 l h$ f0 {F000:0E30 0F22D8 MOV CR3,EAX
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Instruction for CPU step 34
`# ~ I4 r' SF000:0E33 FFE7 JMP DI
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* J/ E2 w7 Z1 r4 \Instruction for CPU step 35
1 v2 @1 N# j# Z8 DF000:0948 66B9FE000000 MOV ECX,000000fe8 u+ \2 X1 h3 \/ j! s
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Instruction for CPU step 36% R9 h/ r. z, g8 r: b0 S
F000:094E 0F32 RDMSR * P7 f7 L/ @7 `' S( x$ q# W
6 G- i, e+ ^1 }* a' oInstruction for CPU step 37
- }5 s0 ^4 i8 s3 C6 q9 [) DF000:0950 0FB6D8 MOVZX BX,AL
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! w# S4 X) K ZInstruction for CPU step 38
7 c, M* X s2 k8 cF000:0953 6633C0 XOR EAX,EAX
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Instruction for CPU step 39
0 B4 F* \- N3 s6 D C2 FF000:0956 668BD0 MOV EDX,EAX : A5 S" b4 x/ y W- ?# I$ |# }
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Instruction for CPU step 40
+ i- X" M5 C) E; bF000:0959 B95002 MOV CX,0250 & U$ Z9 j% T6 p/ |1 @5 j
; K: i5 o! Y& P& [9 q" zInstruction for CPU step 412 @9 F, u9 f) e P+ q
F000:095C 0F30 WRMSR
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- I: O X* i" j+ |! B& }' XInstruction for CPU step 42
1 D5 h2 x/ \( w% g# GF000:095E B95802 MOV CX,0258
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Instruction for CPU step 43
$ ^! j6 t% m8 ~F000:0961 0F30 WRMSR
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7 U# w% P; D8 D+ _0 z; mInstruction for CPU step 446 W, Y1 J; N- Q- Q3 U2 \. R5 s0 `7 R
F000:0963 B95902 MOV CX,0259
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Instruction for CPU step 457 s3 P- W; b# Y
F000:0966 0F30 WRMSR / L* n" k* u; v" b5 l, C! L0 M
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Instruction for CPU step 46
8 g% n& a9 h, ^. E' zF000:0968 B96802 MOV CX,0268
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Instruction for CPU step 47
f. q7 r$ q' O7 J1 U: z2 wF000:096B 0F30 WRMSR
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9 P( ^) {$ l1 j- ]' fInstruction for CPU step 484 H# d8 s/ k2 S( @. I. R; J! ^$ x
F000:096D B96902 MOV CX,0269 , Y! S3 d, r& T) |) t- p: n
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Instruction for CPU step 49
2 Z; J! b% S2 w" Q0 T6 G4 ?F000:0970 0F30 WRMSR 6 t7 B+ h& ~ Z$ v" M
@4 F5 d, |% UInstruction for CPU step 50
- ]5 \; r M. g' l; SF000:0972 B96A02 MOV CX,026a % b3 ?, L7 {2 S3 _1 V9 K- H. C
; j# Z6 b& w* }* E% x( hInstruction for CPU step 51# P! O6 W, [- \
F000:0975 0F30 WRMSR
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& n. G6 u: c! l% q' l0 G9 gInstruction for CPU step 52
" ]5 l2 B! d: W9 _F000:0977 B96B02 MOV CX,026b , q9 ]6 |2 Z/ `4 F' r0 W3 l* I
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Instruction for CPU step 53) n! o6 Q5 k+ }( R+ w, [
F000:097A 0F30 WRMSR
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7 O, @0 |+ R4 y- ?' R( g0 HInstruction for CPU step 54
* x. g* y, U% ?" `; BF000:097C B96C02 MOV CX,026c 5 Z y- N& Q9 C+ Z
& n+ H$ t. V6 y4 I8 DInstruction for CPU step 55; G7 B: k9 p; x' `6 P* m
F000:097F 0F30 WRMSR
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3 K/ t! X$ u6 `- g- DInstruction for CPU step 56& y* q9 }- j# m2 F4 |
F000:0981 B96D02 MOV CX,026d
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. e8 `. G6 C E% P$ r3 ^/ WInstruction for CPU step 57
5 i6 ]4 d5 }: `5 {/ v4 x8 u2 gF000:0984 0F30 WRMSR
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Instruction for CPU step 58
2 O- { x8 y% ]# n' H6 k4 }0 l; B2 U. BF000:0986 B96E02 MOV CX,026e
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Instruction for CPU step 59
, E3 J8 X g0 f9 cF000:0989 0F30 WRMSR
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- V% t# v3 q' s; |Instruction for CPU step 60
' b# Q! h( ~% j! U8 {F000:098B B96F02 MOV CX,026f - p2 U: O4 i7 ^5 f2 v! G) X
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Instruction for CPU step 61. W, ?/ t. Y" T2 D2 I
F000:098E 0F30 WRMSR ( v6 a5 ^- I* R: d5 v' m7 O: |
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Instruction for CPU step 62
3 F9 R5 ?* c; D$ [) m) T; T' _* P) PF000:0990 D1E3 SAL BX,1 6 U8 l: [; p% W* P
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Instruction for CPU step 63
5 p4 D3 l9 b# s4 RF000:0992 B90002 MOV CX,0200
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8 T9 ^% t" R. b- S- i- ~Instruction for CPU step 64% g; q% L; h- L* I, }, q
F000:0995 4B DEC BX * R& l$ L0 x- A6 {3 f( R
0 V9 o; j. p/ Q3 q9 H" ?) dInstruction for CPU step 65
) k- ]. @. ^1 b& `7 s* e ~* |F000:0996 0F30 WRMSR " Y5 P, [2 L% A; ~0 q4 x% X! T; [1 U
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Instruction for CPU step 66
8 d8 n% w0 {% S8 X) e2 g# y% DF000:0998 41 INC CX
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9 u: S0 b' @$ ^8 HInstruction for CPU step 67
- W0 V+ a) Q$ W3 w* e. ~7 KF000:0999 0BDB OR BX,BX * S, k5 M) O! d
' ^4 C' t! S5 ]: w `Instruction for CPU step 68
1 V5 y* R. |) P9 a1 yF000:099B 75F8 JNE short ptr 0995
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Instruction for CPU step 694 n" ]' |0 p* U$ b
F000:0995 4B DEC BX 5 M! t1 q0 I, E1 q8 W$ Y# l, i
6 Y9 a2 n7 O9 W2 a N7 p( wInstruction for CPU step 70
( b' L+ p* f7 _2 C* I; xF000:0996 0F30 WRMSR 1 e9 p* J) {5 U9 F. ]2 v
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Instruction for CPU step 71
1 n$ [" E% s: K7 m- L$ G' U" sF000:0998 41 INC CX 4 ^: s. a2 D8 R5 _1 {2 P) m
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Instruction for CPU step 72% m9 H6 Y" C0 L# Q
F000:0999 0BDB OR BX,BX `9 S. B( h+ @; E8 l6 K
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Instruction for CPU step 73
) p6 n. a: z6 N+ rF000:099B 75F8 JNE short ptr 09954 V2 p6 k b4 U/ P0 `+ d
8 L, S5 y1 T. Y7 ?# [3 _( }Instruction for CPU step 74
% r2 G4 L$ e4 ~5 R& N# YF000:0995 4B DEC BX " R2 ^& a: U) `8 k. N: r- q
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Instruction for CPU step 75' S0 A% N. D2 d" x5 U+ Y
F000:0996 0F30 WRMSR 1 G9 S7 p# Q8 L5 {$ q. R. H% g
8 y/ X/ g1 u- cInstruction for CPU step 76
9 p. J$ |" j7 A: h) s! o1 ^F000:0998 41 INC CX - q% }4 m( L# B: {$ v/ I3 B# Z. _
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Instruction for CPU step 77
4 X- N7 \) N3 o' h) E; V8 mF000:0999 0BDB OR BX,BX " ~" e2 F' _% c/ B }3 r
. N7 R6 i# P% n1 dInstruction for CPU step 78
2 Z3 I! `1 m& B) ~# lF000:099B 75F8 JNE short ptr 0995
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Instruction for CPU step 79
7 t: r- C9 n$ E. C/ pF000:0995 4B DEC BX $ b/ E3 l- y% f% l& |1 u& I
j! X% t* n3 g% H2 aInstruction for CPU step 80
5 Z) M, h9 u, S' k4 f* y3 MF000:0996 0F30 WRMSR
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8 T4 W& c2 A' \ e. J1 N/ c! C$ N7 uInstruction for CPU step 81
: ~6 [; G& `* _5 kF000:0998 41 INC CX
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) P1 ^( E. Z5 e) @Instruction for CPU step 82: R, S. n: D- V( T3 ?2 W
F000:0999 0BDB OR BX,BX 9 c4 x/ P& r9 D. l9 v
" ]+ q ?% `: a, ?" S9 VInstruction for CPU step 83
4 l' `0 @4 A) Y, A& [F000:099B 75F8 JNE short ptr 0995
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Instruction for CPU step 848 j1 z2 i5 j! @ ~& G
F000:0995 4B DEC BX 6 q/ L, H( M1 F+ j* R) T( s1 e5 `
/ ]/ @3 e% r* B0 |' B. pInstruction for CPU step 85: Y, R5 C+ ~, b( f; U0 ]
F000:0996 0F30 WRMSR
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Instruction for CPU step 86, w2 H/ C$ @9 P' m" X
F000:0998 41 INC CX
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, l& c& @# X* ^: z# QInstruction for CPU step 87) d: g, s1 L) ~
F000:0999 0BDB OR BX,BX , K9 n9 e% d; t* J
# X$ N4 f+ P0 I7 T% ]Instruction for CPU step 88- H) e& O. ^/ x4 k5 K/ Q
F000:099B 75F8 JNE short ptr 09954 \' x6 r9 }$ l% G& ~
' H7 a( ~; N- y: IInstruction for CPU step 899 h. r1 b- S. Q
F000:0995 4B DEC BX : g( I4 E1 _! H1 Y
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Instruction for CPU step 907 m6 G6 |' r9 M! a# x% V
F000:0996 0F30 WRMSR
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8 y) z$ ]+ G3 j: A7 hInstruction for CPU step 91! U J% H& g8 w" X3 z8 R9 T
F000:0998 41 INC CX * J2 o1 a' O$ X; R i' ^
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Instruction for CPU step 927 [' G- R& L1 _: h
F000:0999 0BDB OR BX,BX # z9 _- }" A; Y, a7 k0 t% U0 I0 M$ `
# c; x4 @3 |9 S H+ P+ S9 b. XInstruction for CPU step 937 _& z1 w: [" c$ @4 I- R
F000:099B 75F8 JNE short ptr 0995
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/ [' C) e/ p6 [+ z+ JInstruction for CPU step 94% F H! V+ u. A' b; W
F000:0995 4B DEC BX ) X4 ~- k/ t/ [
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Instruction for CPU step 95
1 _" d2 |# s" R: _9 j' rF000:0996 0F30 WRMSR 1 u+ i5 j- P+ x) p+ ^7 T/ c. i3 s& J
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Instruction for CPU step 96
% |8 M5 B, V0 P: o+ P2 g, sF000:0998 41 INC CX - C6 R! n' M% v+ k. p- ?) c
) _2 e- X/ _% AInstruction for CPU step 97
* t! w9 r5 G, _ |0 L+ o& SF000:0999 0BDB OR BX,BX
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Instruction for CPU step 98
, f& F2 l1 o1 B4 ]& |$ X9 o+ HF000:099B 75F8 JNE short ptr 0995# z4 D* z4 y8 x5 A* `" F
7 I. {" N: j1 c5 f+ r+ aInstruction for CPU step 99, w% G# ^! w0 |, R7 `2 Z
F000:0995 4B DEC BX 4 ]7 ~8 K, W( N; ]3 v
! g8 x0 s4 |8 j4 JInstruction for CPU step 100, }- l* B P8 ?1 S2 ~& q
F000:0996 0F30 WRMSR
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. H- o6 @8 f4 D0 rInstruction for CPU step 101% G" R9 D' f/ [* t+ z
F000:0998 41 INC CX " y3 ~6 `' E, i0 e$ u2 R
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Instruction for CPU step 102& |/ W4 w4 f% C& {
F000:0999 0BDB OR BX,BX
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0 W1 ?7 b9 r; i1 E& u: E/ LInstruction for CPU step 103# a: ^2 U; r( Y2 L
F000:099B 75F8 JNE short ptr 0995
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Instruction for CPU step 104
, _" W/ u+ R/ @! n4 l' `9 R& m' iF000:0995 4B DEC BX |
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