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Feature Summary
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Low Pin Count Host Interface (LPC)
& X1 v2 a# G4 b SIRQ supporting IRQ1, IRQ12, SCI: R$ L6 c; K5 M- }' @
I/O Address Decoding:
0 S, }) W- }3 e- u$ M KBC IO Port 60h/64h# @9 O. B( }: B/ ?
Programmable EC IO Port 62h/66h and 68h/6Ch
% f5 n" [, R7 P6 p9 N8 q Programmable 4-byte Index I/O ports to access internal registers
) m, f: x6 k1 c. N. v0 _/ K; A One Programmable I/O write byte-address decoding* t- t2 E5 L, _4 S6 e% b, {
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X-Bus Interface (XBI)# N$ ^" _9 l- ~9 H- S# A* e
SPI Flash support, the operation frequency runs at least 50MHz.- U0 E% W5 r- n/ ?* `( y
Addressable Memory range up to 24MB.
8 w7 r0 s. P M6 a g; } 8051 64KB code memory can be mapped into 4 independent 16KB pages.# E) I) A( o- Z* C
" h6 A$ K7 p5 P k+ P" O9 }- B8051 Microprocessor
* h W8 \! f9 h, _" ]! l) _ Industry 8051 Instruction set complaint with 3~5 cycles per instruction. J" z- N+ m. v) z- K; W
Programmable 8/16/32 MHz clock3 T& e( i' L5 O/ C& T, y' ^+ K* T8 t
Fast instruction fetching from XBI Interface3 M/ o# `. {; f. ]
128 bytes and 2KB tightly-coupled SRAM3 w9 U; n5 }* F& x3 q8 D2 D w
24 extended interrupt sources.& b2 I. i) J6 V- f6 T5 U$ J$ y5 I
Two 16-bit tightly-coupled timer" e/ S$ _; y; H9 u. T f# v
. k5 G) s+ v3 V& b. b9 k0 t Y8 y8042 Keyboard Controller
1 \) N5 ~% ?# m3 I 8 Standard keyboard commands processed by hardware
6 R! _3 Y+ n& [9 ] Each hardware command can be optionally processed by firmware
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Embedded Controller (EC): O' u1 S& | T/ L( ?2 t- x
Five EC Standard Commands can be processed by hardware& V1 j V# e; k) j7 d
ACPI Specification 2.0 compliant
7 G1 c& g6 }0 [" I, h9 E! p Support customer command by firmware
5 Y. m3 C) V" _ Programmable EC I/O port addressing (default 62h/66h)# |( c5 N1 O: y8 e5 s
5 j E! H/ \$ M; z8 LAnalog To Digital Converter (ADC)
5 u" u7 |1 S" F! P6 { 6 built-in ADCs with 8-bit resolution.
6 ^5 M5 K9 P$ C" w" i7 h The ADC pins can be alternatively configured as General Purpose Inputs (GPI).5 Q. k) y" l1 i1 M
x+ f: F# f; x IPulse Width Modulator (PWM)
( z1 F8 O4 z$ h0 A B# y, x 5 built-in PWMs
! Y! e; b+ o' @5 t" C6 n Selectable clock sources: 1MHz/64KHz/4KHz/256Hz.9 R; ?" K) S i+ }/ {
Configurable cycle time (up to 1 sec) and duty cycle.% o c/ f: I) R
* A* Q* y; Z& o9 v, r& j
Watchdog Timer (WDT)$ W' t7 f& T# v6 _& p
32.768KHz input clock with 20-bit time scale.
Y: e( n/ L; R; o% K' m 8-bit watchdog timer interrupt and reset setting0 w3 B$ R; W7 y) g; o
1 @0 ~. h% [: [1 Z
General Purpose Timer (GPT)
$ Y& P! [* i1 ?, s! `* f" j Two 16-bit, two 8-bit general purpose timers with 32.768KHz resolution
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General Purpose Wake-Up (GPWU)
H& S+ {0 `$ @) i1 D All General Purpose Input pins can be configured to generate interrupts or wake-up event.
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& h7 O9 z9 h. s( rGeneral Purpose Input/Output (GPIO), c2 s( f, S5 ?5 I
All I/O pins are bi-direction and configurable: `) V+ W& L( S( v0 _9 E
All outputs can be optionally tri-stated/ ^9 O9 t, K. a3 O! w( v( d
All inputs equipped with pull-up, high/low active, edge/level trigger selection5 x B2 P" ]) \8 M' e1 N% w* C
All GPIO pins are bi-direction, input and output.7 X6 a9 ?0 r! L9 L! @
Max. 43 GPIOs
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' u3 H: H' {6 |4 ?9 NPower Management- M/ N+ t) R; Q# x$ i
Sleep State: 8051 Program Counter (PC) stopped& P: {* t8 {; V8 r" W6 E1 F
Deep Sleep State: Stop all internal clocks. Target power consumption ~10uA.
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