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Feature Summary1 a3 m1 r" ^& D. C
7 u7 H$ r6 Z$ Q" TLow Pin Count Host Interface (LPC) _: a) z5 c- l) i: \
SIRQ supporting IRQ1, IRQ12, SCI7 l! @& ~7 L; F- w8 N B5 g, P
I/O Address Decoding:, Y* J. S+ m$ e6 v
KBC IO Port 60h/64h( k5 |, [9 B, A+ I
Programmable EC IO Port 62h/66h and 68h/6Ch
6 w; r v0 n! a# r Programmable 4-byte Index I/O ports to access internal registers& y3 x. `1 [9 h1 ] [- b2 D
One Programmable I/O write byte-address decoding y F+ e9 c2 ^4 M+ t; s
( F0 k) I! m% ` g% n$ l9 f' z
X-Bus Interface (XBI)6 R8 J1 z& D7 ~* C4 D2 h. }2 [
SPI Flash support, the operation frequency runs at least 50MHz.2 |7 O5 q/ @9 Y' ?+ M7 S
Addressable Memory range up to 24MB.1 b& X/ ]1 ~% F. f8 p' A) P5 O1 X
8051 64KB code memory can be mapped into 4 independent 16KB pages.
' N" h' z$ u5 @3 s: v8 V5 |" ^- y& C [( a* K" r
8051 Microprocessor
, @+ C( u1 n* N- F, T' [, p Industry 8051 Instruction set complaint with 3~5 cycles per instruction.& g! H: u/ W% O
Programmable 8/16/32 MHz clock4 d8 J" z& C9 z7 m, w4 n+ T5 _
Fast instruction fetching from XBI Interface* ^# Y' U9 z' ^: F
128 bytes and 2KB tightly-coupled SRAM: |- [: p1 ?4 c) y6 t- j& a5 B
24 extended interrupt sources.
# U+ `+ @% n" D1 L$ s0 Q7 y Two 16-bit tightly-coupled timer! C( y, X+ Q, T- k( |7 s
. s, Z# L a; ~( W2 P& s5 a8042 Keyboard Controller" J9 L$ e4 ~* o9 N
8 Standard keyboard commands processed by hardware3 `# l: K# h$ X# Z* f9 O4 a4 u
Each hardware command can be optionally processed by firmware5 A# R. T0 K' |. B
/ S; w& _' I6 T" @; ^* _Embedded Controller (EC)5 z; p5 H; y4 L' j }& }
Five EC Standard Commands can be processed by hardware" Y: K9 s2 K# K, k' I+ o9 _: n
ACPI Specification 2.0 compliant
/ v0 f+ u% i# j! {9 N" h4 Q6 W$ a& ` Support customer command by firmware! ?1 z. y3 H4 D+ K: J7 ]+ Z% i
Programmable EC I/O port addressing (default 62h/66h) k8 ]2 V" i8 `6 F
( ~$ y% S' ~6 d7 h0 w8 Y V: F- r
Analog To Digital Converter (ADC)- H1 Q9 T% w( l$ Z: H' E
6 built-in ADCs with 8-bit resolution.6 a3 O. [3 U3 l/ Z, f! m
The ADC pins can be alternatively configured as General Purpose Inputs (GPI).
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, Z8 E4 [: {* v7 k$ x& KPulse Width Modulator (PWM)
0 U$ n+ k; W4 T H/ F9 g: d) m 5 built-in PWMs' Y! j6 n) Z7 x4 X9 F3 b
Selectable clock sources: 1MHz/64KHz/4KHz/256Hz.# s" s0 {' y3 ^
Configurable cycle time (up to 1 sec) and duty cycle.+ \1 [" \- C/ a( p/ u7 ^3 ?
) T; q2 z5 y7 d' V' k) K( }Watchdog Timer (WDT)* U% u- C/ o' d! g6 \5 U0 r
32.768KHz input clock with 20-bit time scale.
5 o* Q+ L& c1 h7 T 8-bit watchdog timer interrupt and reset setting
4 w/ @! z# N& @/ v( V" r- l. r. S6 m' u/ y! _ S+ I* M
General Purpose Timer (GPT), p- X+ M Q" ]6 F# o
Two 16-bit, two 8-bit general purpose timers with 32.768KHz resolution
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- v& d, _ v. o2 zGeneral Purpose Wake-Up (GPWU)- J; l. J' y8 ^/ n7 n
All General Purpose Input pins can be configured to generate interrupts or wake-up event.+ C/ S& _1 P9 W$ E. X
: P, i! {" e" [1 O# v
General Purpose Input/Output (GPIO)$ h8 S" E1 ~8 U: k2 p
All I/O pins are bi-direction and configurable9 W) E2 Q: c3 p# P) \7 @- K. x
All outputs can be optionally tri-stated0 g/ Z( f( m" i
All inputs equipped with pull-up, high/low active, edge/level trigger selection
' B8 i G9 L! W) d t All GPIO pins are bi-direction, input and output.
0 u; B4 @/ {- r Max. 43 GPIOs0 o N* b% I: ~5 W3 L" E" d
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Power Management
1 B) @+ ^& F6 \" K" i6 y8 o* [ Sleep State: 8051 Program Counter (PC) stopped
5 K% i# p2 P; M* F/ D a' } Deep Sleep State: Stop all internal clocks. Target power consumption ~10uA.* s' X) H) ` D- f2 x& s: h2 W
$ l% F [! g2 b; JTotal Pages: 40 |
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