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Feature Summary J2 O. s/ {. u
3 d7 C3 {6 g' a" nLow Pin Count Host Interface (LPC)
) ~8 e4 L- A: u SIRQ supporting IRQ1, IRQ12, SCI
1 T$ K: T, b4 A( c& L0 r I/O Address Decoding:( Q& F4 e' b( {# }/ j
KBC IO Port 60h/64h
7 ^7 N3 y, n2 j* L Programmable EC IO Port 62h/66h and 68h/6Ch/ I$ p+ x( x: l9 @9 }
Programmable 4-byte Index I/O ports to access internal registers# u4 s/ y0 d/ @7 J" M
One Programmable I/O write byte-address decoding3 e m" ]2 P0 I5 l% E, Z
* ]6 n5 C' {6 P$ @: C
X-Bus Interface (XBI)8 c6 g% W; d( [+ h$ P) u
SPI Flash support, the operation frequency runs at least 50MHz.
3 e, R G1 C1 L! V- d _. ` Addressable Memory range up to 24MB. y {# o+ d0 `
8051 64KB code memory can be mapped into 4 independent 16KB pages.: Z( j0 E' s" w7 R3 I6 M/ ^9 v3 l
7 ^9 \( s" q8 b% T) @* R8051 Microprocessor
, k' E9 T/ S9 P6 q( G4 ` Industry 8051 Instruction set complaint with 3~5 cycles per instruction.7 K& M& A) b& o! L6 ^
Programmable 8/16/32 MHz clock
: C4 X6 b9 P1 v2 v7 U, a Fast instruction fetching from XBI Interface
9 w8 s3 v2 c* b2 C! _. n 128 bytes and 2KB tightly-coupled SRAM! B" W7 g8 F! {8 w- N9 Z
24 extended interrupt sources.* J" d! o5 c+ j5 ]4 A% F( e7 f
Two 16-bit tightly-coupled timer
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" l; ]0 O/ ]9 V) N- \* i8042 Keyboard Controller& X6 G: @& E6 L" e; v0 H
8 Standard keyboard commands processed by hardware* P- H- E, Y6 v: E& R( G
Each hardware command can be optionally processed by firmware
+ ?, _; Y ?7 X9 c/ i6 u
* D( |! d R/ [- ^% wEmbedded Controller (EC)+ p/ Y* k& ]/ ^
Five EC Standard Commands can be processed by hardware' ~/ Q: w* F3 t. J4 ]0 p) l: d
ACPI Specification 2.0 compliant
# @4 J6 }; l- C6 V: ]7 Z# ] Support customer command by firmware
! B G% s# ?3 ?! C2 g6 v6 G9 \ Programmable EC I/O port addressing (default 62h/66h). Q' ^. C0 E7 Z2 u" e9 w
& X G l$ [# W6 x: Y2 C
Analog To Digital Converter (ADC)9 d0 X6 M" M9 L2 O
6 built-in ADCs with 8-bit resolution.
$ h: {1 W$ o6 b: R& b The ADC pins can be alternatively configured as General Purpose Inputs (GPI).
" l1 M- Z8 p/ q/ g4 g2 ^0 w8 H7 q
Pulse Width Modulator (PWM)
, _ r" L; R1 r+ e0 X' D' K2 G 5 built-in PWMs
7 W. X1 Q Z* ]7 ] Selectable clock sources: 1MHz/64KHz/4KHz/256Hz.
! s5 I- V* ` J* b# a( f Configurable cycle time (up to 1 sec) and duty cycle.. c! v: E5 o. G; f! H
* ?% ?0 Y+ U% Y; T* y! `Watchdog Timer (WDT)
. @& [+ `! ~$ q' M; x. @ 32.768KHz input clock with 20-bit time scale.
* t4 B0 _- I/ W* z" k; J1 E 8-bit watchdog timer interrupt and reset setting
# Z$ i/ q3 X8 e- \8 |6 z+ d. ?; Z( M& s# B7 [5 _( r. l
General Purpose Timer (GPT)4 m6 T" u$ T5 J
Two 16-bit, two 8-bit general purpose timers with 32.768KHz resolution# K6 U% y( u9 y! a/ j. O" v
; U: |% M4 E2 k; ~, w' v
General Purpose Wake-Up (GPWU)
& D; ]1 C; C! p' r All General Purpose Input pins can be configured to generate interrupts or wake-up event.
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, p7 F; E: n- J$ V" \General Purpose Input/Output (GPIO)6 Y; u* \7 y" }# C9 U8 |% c
All I/O pins are bi-direction and configurable
+ e; ^& S; ]( d& E All outputs can be optionally tri-stated
1 t3 V# H( A! { All inputs equipped with pull-up, high/low active, edge/level trigger selection, S% o2 m, e( L- Q9 s$ w$ i# {
All GPIO pins are bi-direction, input and output.1 \4 |) `& h$ |
Max. 43 GPIOs
5 }& g8 v, E, _7 [8 y: @) O
* \) \+ i+ g) n! i" ]Power Management& R* [4 [! Y7 L- S( N0 ?
Sleep State: 8051 Program Counter (PC) stopped6 a" |( w# m* |& b, g
Deep Sleep State: Stop all internal clocks. Target power consumption ~10uA.
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