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Feature Summary
( T2 ~7 E' I4 \3 y' S2 E" W, h+ p6 U* c* L0 \; f0 @4 ]- _' `
Low Pin Count Host Interface (LPC)
. E9 g* A" u8 _. b. ~8 c SIRQ supporting IRQ1, IRQ12, SCI
+ {, y# Z4 U9 E' i7 c0 \ I/O Address Decoding:. t5 \2 E3 ?+ {, F4 p) [+ Z
KBC IO Port 60h/64h
& }+ d% K/ l+ {; H) g* l, Z Programmable EC IO Port 62h/66h and 68h/6Ch0 w3 U. {* {5 ^( P4 [" `% K
Programmable 4-byte Index I/O ports to access internal registers
7 O. J( b$ s O One Programmable I/O write byte-address decoding
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. Q$ s6 p! I, d* X- W4 LX-Bus Interface (XBI)2 l0 s0 F% z/ C# a/ _
SPI Flash support, the operation frequency runs at least 50MHz.0 B/ \; z: A, ` m& ?
Addressable Memory range up to 24MB.8 |1 Q, w+ h8 E r; l
8051 64KB code memory can be mapped into 4 independent 16KB pages.! Z; w! w% t& K( H
! |" Y9 I7 B* r6 ` Y8051 Microprocessor1 w/ T3 ^0 Z; o; O0 n
Industry 8051 Instruction set complaint with 3~5 cycles per instruction.
^4 B' C" L1 n. j Programmable 8/16/32 MHz clock* N' {% D) G m/ G' Z0 s
Fast instruction fetching from XBI Interface
3 O5 A+ g" T( C- O 128 bytes and 2KB tightly-coupled SRAM# o8 @3 K' _0 E3 e! q+ A9 `; ]! T2 h
24 extended interrupt sources.
6 m0 O E3 j* |' ^+ ~, x N9 q% b Two 16-bit tightly-coupled timer% k- v# u% o+ J1 }5 g# `$ e
7 T! d8 L6 f S- Z
8042 Keyboard Controller
/ Z J3 W0 o, R# W: o9 W0 k* v 8 Standard keyboard commands processed by hardware
9 n2 B8 e' f3 l; |" c1 ` Each hardware command can be optionally processed by firmware' I8 `- @8 _" e4 |1 a
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Embedded Controller (EC)
T2 _1 a4 ]2 S! G7 f Five EC Standard Commands can be processed by hardware
p" Y2 S1 ~# n1 j- H* ^% [6 A" j$ P* z ACPI Specification 2.0 compliant
- I0 w, `( S+ d' [! c, x Support customer command by firmware$ S& s: ^2 |1 L) w
Programmable EC I/O port addressing (default 62h/66h)
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5 }1 F! `+ M N- ^. q. w2 N5 H, YAnalog To Digital Converter (ADC)
# _1 \! Z5 L4 a3 D 6 built-in ADCs with 8-bit resolution., V& i! ^! o. M" }
The ADC pins can be alternatively configured as General Purpose Inputs (GPI).4 r; @1 W9 a$ R# L n
7 L" _/ m" y# ZPulse Width Modulator (PWM)( w+ n6 L A8 }5 V+ x4 N5 C
5 built-in PWMs3 y2 \$ F6 T- k5 Q0 L/ P T6 Z
Selectable clock sources: 1MHz/64KHz/4KHz/256Hz.
( x m3 {; |4 T s Configurable cycle time (up to 1 sec) and duty cycle.
" F1 W0 U. b' A3 z4 F$ X$ L+ `6 F" z1 j# c
Watchdog Timer (WDT)0 |/ T8 l. |' ]/ D$ P
32.768KHz input clock with 20-bit time scale.
" _* C3 ?1 f. Y( E# o 8-bit watchdog timer interrupt and reset setting
+ y( \) K! S& v/ M( o- m. E, |7 ^8 [, A
General Purpose Timer (GPT)) U7 ]5 z5 b' @+ }$ j1 `! s
Two 16-bit, two 8-bit general purpose timers with 32.768KHz resolution$ N% B Y: A( i, L; c* t3 B
^9 @ N6 ~# A& TGeneral Purpose Wake-Up (GPWU): O7 @4 k; l8 O0 u0 M7 c. t0 J* t
All General Purpose Input pins can be configured to generate interrupts or wake-up event.& O4 V) ~ G* ~5 `
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General Purpose Input/Output (GPIO)* H4 ]* U. I) G" W( E" |
All I/O pins are bi-direction and configurable
0 ]& P: z" g: Q! z4 K All outputs can be optionally tri-stated
8 d) z O) Z8 ? All inputs equipped with pull-up, high/low active, edge/level trigger selection$ l: C# l# B) t7 w3 N' i" F. c5 ?1 ]
All GPIO pins are bi-direction, input and output., {& R; C5 c" {
Max. 43 GPIOs
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Power Management1 V& N) {/ L- P* E; {- H6 X; g( G
Sleep State: 8051 Program Counter (PC) stopped- J+ A: Z+ S7 K" l: i
Deep Sleep State: Stop all internal clocks. Target power consumption ~10uA.
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