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Feature Summary
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% V* O2 x0 L2 U, vLow Pin Count Host Interface (LPC)* [1 k/ j' w }7 t' n
SIRQ supporting IRQ1, IRQ12, SCI
, P7 B5 v& L8 [6 v' b E$ u I/O Address Decoding:
+ s& X! M. z) h- I. T' l% Y! n KBC IO Port 60h/64h7 Z% @# R! }7 |( {2 @: b$ D
Programmable EC IO Port 62h/66h and 68h/6Ch
8 W% E ~- D. _7 q; g Programmable 4-byte Index I/O ports to access internal registers
1 P5 @' N( p0 k" i( t3 p1 M9 X One Programmable I/O write byte-address decoding
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X-Bus Interface (XBI)
( ~5 ^$ i$ q' u& z SPI Flash support, the operation frequency runs at least 50MHz.1 R" S4 p- A$ F8 k
Addressable Memory range up to 24MB.0 e' o/ N+ S, N7 J8 f# w# R
8051 64KB code memory can be mapped into 4 independent 16KB pages.
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8051 Microprocessor
/ m5 k! b" r$ k" Y; s; H Industry 8051 Instruction set complaint with 3~5 cycles per instruction.
' g: q. t7 [9 L$ s1 B/ E- Y Programmable 8/16/32 MHz clock% r& J/ w# J6 i& o% M2 I+ f
Fast instruction fetching from XBI Interface5 F2 G7 R- h7 p- B9 C
128 bytes and 2KB tightly-coupled SRAM
" \( y% J# m1 W9 E' T" y 24 extended interrupt sources.
2 Y; k4 i, K1 a+ W Two 16-bit tightly-coupled timer
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8042 Keyboard Controller' B _& W( f4 u$ Q" P
8 Standard keyboard commands processed by hardware
8 {; `+ ]1 T7 O9 B Each hardware command can be optionally processed by firmware
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Embedded Controller (EC)
8 i9 `' R2 o# {' ^ Five EC Standard Commands can be processed by hardware0 Z& d3 u9 g! ^- P8 p- b C+ R4 F2 \# x( C
ACPI Specification 2.0 compliant. d1 j+ C9 c/ x# i
Support customer command by firmware6 G7 h5 S3 D/ I: U9 O7 g$ I) D
Programmable EC I/O port addressing (default 62h/66h)
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Analog To Digital Converter (ADC)
% T: [7 B9 m% Y& Y% w- _5 F) f( s 6 built-in ADCs with 8-bit resolution.& V) n% j. t! o7 M8 v9 a& L
The ADC pins can be alternatively configured as General Purpose Inputs (GPI).
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Pulse Width Modulator (PWM)
5 k! a$ w) E K4 f 5 built-in PWMs
; D: o9 T4 K2 `/ [( D% p7 q Selectable clock sources: 1MHz/64KHz/4KHz/256Hz.
$ u+ s6 ]/ N. V9 C( h Configurable cycle time (up to 1 sec) and duty cycle.! C+ @ T( v2 Q4 L
! p% w9 ]2 @9 ^' J, Q. dWatchdog Timer (WDT)" J6 M3 P' R2 b3 k4 K/ W: \4 J7 b
32.768KHz input clock with 20-bit time scale.
" E ?; P4 S% C# U 8-bit watchdog timer interrupt and reset setting
4 P; X. D2 V+ \9 S- O3 }: Q) a1 a. V
General Purpose Timer (GPT)
0 ~2 t0 t" g1 h, o3 Q/ r Two 16-bit, two 8-bit general purpose timers with 32.768KHz resolution* O7 O, j a$ a" {/ n: u
; `" a! k0 h5 _, V+ GGeneral Purpose Wake-Up (GPWU). X/ Y6 `6 \5 b+ ^
All General Purpose Input pins can be configured to generate interrupts or wake-up event." _8 l6 y0 I4 t `/ V
0 b4 O9 A: c) x: |General Purpose Input/Output (GPIO)
" `2 t+ l0 |) v3 H/ g6 ] Z All I/O pins are bi-direction and configurable" U# `# x( v8 C8 _. p0 d& \, ]
All outputs can be optionally tri-stated
8 O. J( p. m9 c' T. ]! ^! H/ l All inputs equipped with pull-up, high/low active, edge/level trigger selection/ {3 z' K( p% D( \- f/ ^3 B6 H
All GPIO pins are bi-direction, input and output.
4 E) u9 K1 g8 @0 i8 N4 n: q% G+ p Max. 43 GPIOs
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8 e1 F5 g+ P# T, pPower Management7 g! B5 _' A* I1 t- L3 e6 f
Sleep State: 8051 Program Counter (PC) stopped& e6 h' \ p6 u. q; O5 A8 ]# o
Deep Sleep State: Stop all internal clocks. Target power consumption ~10uA.0 a+ Y8 s C6 |7 ]0 S6 p
! H5 T) r* s b( O! pTotal Pages: 40 |
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