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Feature Summary) X0 @& W/ U j% p
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Low Pin Count Host Interface (LPC)
6 i- k' j' T' H SIRQ supporting IRQ1, IRQ12, SCI9 h) |1 j/ e- t8 D: X7 Z9 T G
I/O Address Decoding:
' |, E2 b3 d' ^- ]' C1 D9 D KBC IO Port 60h/64h
V7 S4 Z+ u$ P7 k Programmable EC IO Port 62h/66h and 68h/6Ch; ^/ a+ M2 o% R; d
Programmable 4-byte Index I/O ports to access internal registers3 Z2 j! U7 S4 M y+ f# n
One Programmable I/O write byte-address decoding, g' F* w. D* @ ~% \9 y) `
/ d$ O! b/ r2 W; h" x8 R6 U+ U7 z6 \X-Bus Interface (XBI)
! a! y, B4 w& R$ \/ ] SPI Flash support, the operation frequency runs at least 50MHz.+ L5 B- s. ~$ W8 q/ `0 w
Addressable Memory range up to 24MB.# L2 g) @$ L% R* i- [' Z
8051 64KB code memory can be mapped into 4 independent 16KB pages.8 ?( H& w7 E7 L7 u8 x- o! `
8 g: Y! N% I$ n7 B# b$ c8051 Microprocessor) f, Y7 L5 J1 l4 Y5 _
Industry 8051 Instruction set complaint with 3~5 cycles per instruction.
3 k# V6 q7 y3 Y: u* {/ `6 Y I Programmable 8/16/32 MHz clock
0 r$ i( |" B4 J/ C Fast instruction fetching from XBI Interface
7 p7 |/ h4 n/ n1 k2 i3 D0 ` 128 bytes and 2KB tightly-coupled SRAM: |' K `8 ?/ | x( ~4 K8 t7 V
24 extended interrupt sources.5 X; E$ D& ]$ F9 p" Z+ ], ~ K
Two 16-bit tightly-coupled timer
3 S8 m4 D3 r! W$ a1 O. ]" |! `& X, c u, N& H$ M7 G: Y
8042 Keyboard Controller
" ?5 d. j( h! K: m& o5 ~! b 8 Standard keyboard commands processed by hardware
" h0 K2 M. o7 n0 M2 d( u Each hardware command can be optionally processed by firmware5 Z) ?, }# g" t. U' G
# D7 S6 G' u) z; C
Embedded Controller (EC)
" q$ N9 M+ ~+ ?& x$ [ Five EC Standard Commands can be processed by hardware: E- H0 Z3 Q9 p5 t# V
ACPI Specification 2.0 compliant: `+ w3 i* O! s: u( b- E: [0 N
Support customer command by firmware
) g1 F! V! i8 N# {% l+ N) D. _/ b Programmable EC I/O port addressing (default 62h/66h)
+ Q4 T+ o, U- e4 k6 g) [; ~* v" B# H# o
Analog To Digital Converter (ADC)
% f, |+ o; z3 r3 T3 l1 J0 Y 6 built-in ADCs with 8-bit resolution.
5 ^, d% R) c" ^4 x) Q The ADC pins can be alternatively configured as General Purpose Inputs (GPI).2 A. z( n/ M# G5 @% Z# j
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Pulse Width Modulator (PWM) {$ w1 ?7 h8 \( C" \ z
5 built-in PWMs; W$ Q' Y4 l9 A: S
Selectable clock sources: 1MHz/64KHz/4KHz/256Hz.- F, H1 }9 ]+ R" M& P2 N
Configurable cycle time (up to 1 sec) and duty cycle.: C. V/ u0 U' {9 k
8 ?7 \7 u1 K( ]; EWatchdog Timer (WDT)
* ~, V0 z* h8 W( D 32.768KHz input clock with 20-bit time scale.: W" k( d" X* M9 X) V0 a1 k
8-bit watchdog timer interrupt and reset setting) M/ ~7 d( X/ p4 P; B! Y
' ?: \" n! }: J% k6 x
General Purpose Timer (GPT)
6 P7 N" Y4 p* T L% E2 T Two 16-bit, two 8-bit general purpose timers with 32.768KHz resolution3 m) a/ ]3 D! u H; E2 J1 O
: c2 s, Q0 v- L5 `1 I( ]General Purpose Wake-Up (GPWU)2 l' \; ]2 P* M5 k& g
All General Purpose Input pins can be configured to generate interrupts or wake-up event.9 {- `! d( }# d$ V0 f, z( V
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General Purpose Input/Output (GPIO)
6 C' f! J W& a; R; t All I/O pins are bi-direction and configurable
$ `( n1 Z& w: c! L& S) u& b! d All outputs can be optionally tri-stated
0 d# y0 u& |' a* X2 U All inputs equipped with pull-up, high/low active, edge/level trigger selection
. j+ a: _% v2 q5 P6 ]/ i All GPIO pins are bi-direction, input and output./ f0 J. l. {7 ~! l7 L
Max. 43 GPIOs
% l4 a4 ]1 w" n9 v
" {8 c- E$ f! J @& i6 f5 ^: tPower Management1 F- d. t% s/ ~' s7 e
Sleep State: 8051 Program Counter (PC) stopped' N- A. F; {$ B+ }
Deep Sleep State: Stop all internal clocks. Target power consumption ~10uA.
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; L" A2 {% X; ]0 B1 k6 ?Total Pages: 40 |
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