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ENE KB3700 Keyboard Controller Datasheet R0.1 2006

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发表于 2007-12-21 18:08:39 | 显示全部楼层 |阅读模式
Feature Summary' l- I: D+ X( }- q
6 W1 j6 R0 e' y& V' D, W
Low Pin Count Host Interface (LPC)+ Y1 S4 }6 I; U$ R9 J
  SIRQ supporting IRQ1, IRQ12, SCI
# U& _- t5 @; h9 }9 s  I/O Address Decoding:- P+ u3 V6 u( P1 Y
  KBC IO Port 60h/64h
: T" ]; I  @% M4 \1 W. ?  Programmable EC IO Port 62h/66h and 68h/6Ch0 e7 n. W  W$ h. z) @- u
  Programmable 4-byte Index I/O ports to access internal registers6 i, \- [1 G# \' r; E. \9 L* W: H
  One Programmable I/O write byte-address decoding
- [) ?. X. t# {+ U& Q4 Z: \( t" D& o# B, |% W0 O
X-Bus Interface (XBI)
: \2 T, Q; m3 e* G  SPI Flash support, the operation frequency runs at least 50MHz.1 Q( ~9 q+ n: x$ I6 p0 g
  Addressable Memory range up to 24MB.
$ M; z& D  r1 |8 o8 ?& T8 i  8051 64KB code memory can be mapped into 4 independent 16KB pages.4 h5 P7 D( U& f' v/ E% z+ M# O7 N0 S

! n: G' {' ^, e% }8051 Microprocessor
6 J  O/ e3 t* g  Industry 8051 Instruction set complaint with 3~5 cycles per instruction.+ r( r  F& `; A4 s1 G
  Programmable 8/16/32 MHz clock
8 o5 W' H: t* s5 h  \, M  Fast instruction fetching from XBI Interface2 F8 W* l3 K/ K, ~( j
  128 bytes and 2KB tightly-coupled SRAM2 C  f$ @9 I( P( q5 `
  24 extended interrupt sources.
* k5 p/ A, v& n" h7 S% x  Two 16-bit tightly-coupled timer
  n7 E9 y5 h' |  _# J% g4 j& D  k, J4 ]4 Q$ V8 G
8042 Keyboard Controller7 O! A' e7 S* w! J- p3 L* s- X$ h
  8 Standard keyboard commands processed by hardware
) y) n$ Z9 T9 v. ^; O6 N, Z0 y  Each hardware command can be optionally processed by firmware
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Embedded Controller (EC)" K. W% x4 J3 M3 S  Z, Z: d9 |
  Five EC Standard Commands can be processed by hardware" p4 O7 F0 _, }& P- I8 j9 Q
  ACPI Specification 2.0 compliant) }9 J$ s  C! g6 ?/ g
  Support customer command by firmware
) Y9 w  ]" D8 Y& ~3 h3 `' x  Programmable EC I/O port addressing (default 62h/66h)
" ~/ k4 R& Y7 J7 W  n& `' o8 s
" j! z: p; `8 \3 |1 C, ?Analog To Digital Converter (ADC)5 W! n! w+ ~, _" F4 ^: h
  6 built-in ADCs with 8-bit resolution.0 b& l5 R4 X8 q+ [2 _3 W3 w5 C
  The ADC pins can be alternatively configured as General Purpose Inputs (GPI).6 K' I; D- a" u* f% r

% C( l) P0 ?7 a8 f- w( N/ gPulse Width Modulator (PWM)5 U2 n9 j+ }* H- w
  5 built-in PWMs6 M- r% s3 l9 e5 o$ ~' l  V8 ]' x
  Selectable clock sources: 1MHz/64KHz/4KHz/256Hz.
; i7 c7 d% [% |6 A1 t  Configurable cycle time (up to 1 sec) and duty cycle.
) L  U3 D/ X4 G" W) M( y5 R
$ s$ J' |8 B$ G8 R9 ~# PWatchdog Timer (WDT)
$ s% B5 f5 l" P( I  32.768KHz input clock with 20-bit time scale.+ s/ R  D% c+ y5 b  ^( R
  8-bit watchdog timer interrupt and reset setting" C2 [: o' h. v, ?
% G' ]  a5 s4 q1 k
General Purpose Timer (GPT)
9 W, m4 \5 n( P$ s4 X  Two 16-bit, two 8-bit general purpose timers with 32.768KHz resolution
( ^7 C2 d1 |3 L; U% k# t
! [, f3 K/ \! ^! IGeneral Purpose Wake-Up (GPWU)
8 D' F) }! l$ _2 S( Y4 [. X  All General Purpose Input pins can be configured to generate interrupts or wake-up event.3 q7 b' t- I' x2 r7 F3 k
: n- A, o+ l* k! l
General Purpose Input/Output (GPIO)
9 _) i& y7 {8 Y5 ?7 w- g1 w9 z  All I/O pins are bi-direction and configurable2 b; `5 m  [& h
  All outputs can be optionally tri-stated/ q% _. y. i% g! {. G0 N) t
  All inputs equipped with pull-up, high/low active, edge/level trigger selection- c" B5 ?5 F# ]0 U1 h
  All GPIO pins are bi-direction, input and output.
; ]+ ?! F  h0 Y. R* U  Max. 43 GPIOs& W/ ^6 W' e$ v7 `2 V" z# x

( [$ C, ?% ?) ~' UPower Management
+ G5 k8 D% `+ a$ `+ ~4 P* j1 l  Sleep State: 8051 Program Counter (PC) stopped
# o6 u6 s  |0 L5 S: i3 @9 b# P  Deep Sleep State: Stop all internal clocks. Target power consumption ~10uA.. L. M9 c6 U/ D6 w% p

. @3 l7 }" H8 c. P7 y4 |6 ?Total Pages: 40

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发表于 2008-12-4 12:05:57 | 显示全部楼层
many thanks! 有KB3310的DATASHEET吗?
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发表于 2008-12-4 16:10:26 | 显示全部楼层
Thanks a lot
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发表于 2009-4-9 15:27:40 | 显示全部楼层
这个SPEC还是太简单了,谁知道ENE在用SPI ROM时,prefetch的cache有多大?如果spi run over 50Mhz,我看到它的8051处理指令需要3~5个cycles,而且听说ENE用的免费的C code,那么你们在用的时候感觉perfermance怎么样?特别是处理PS2 device的时候。
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