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Feature Summary# E! Q+ |8 x/ p/ X
5 K! @/ o x K" L! H0 w
Low Pin Count Host Interface (LPC); J1 T0 S# h4 ^, u2 H2 _
SIRQ supporting IRQ1, IRQ12, SCI
/ |7 N" l2 C) B& m7 ` I/O Address Decoding:
6 A" r3 b. l; f KBC IO Port 60h/64h
, m, y) ~+ \. \4 \, r/ M: ` V Programmable EC IO Port 62h/66h and 68h/6Ch
7 h6 }+ i5 y! S9 ]. j6 N Programmable 4-byte Index I/O ports to access internal registers
5 E! E# f- e: w One Programmable I/O write byte-address decoding. A' S' B* Y4 `2 E1 A6 o, n/ C1 `
) v9 o4 m5 W6 z! A" t0 M- f! lX-Bus Interface (XBI)
. L3 c& ?1 y' M# W) [% A SPI Flash support, the operation frequency runs at least 50MHz.' |2 B+ U7 }6 E# M
Addressable Memory range up to 24MB.
h- r N! a2 m' l) V 8051 64KB code memory can be mapped into 4 independent 16KB pages.
: b; T! P% n) o' T
& E- k* H( y8 F" d& b8051 Microprocessor, m4 g- V( X/ Z0 s
Industry 8051 Instruction set complaint with 3~5 cycles per instruction.
- q4 K5 ~/ G4 p# V1 s7 b! ^+ d* }4 D Programmable 8/16/32 MHz clock
9 s4 g5 z2 \8 t, O& ?/ ?' G$ z Fast instruction fetching from XBI Interface0 H2 ~2 I) s# y' N. _" t4 a
128 bytes and 2KB tightly-coupled SRAM! w7 S8 Q5 M: O
24 extended interrupt sources.
( {# t- M7 i/ }6 y5 R1 Z, B) h Two 16-bit tightly-coupled timer
( u4 L/ [: h/ W( U1 i0 `% u6 |" s3 ?( x' L
8042 Keyboard Controller
$ m1 s& i3 `4 x2 Q+ L& Y2 f$ u 8 Standard keyboard commands processed by hardware
2 O. s. c2 V, W Each hardware command can be optionally processed by firmware
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Embedded Controller (EC)$ e/ C$ l1 d% v* R- T: W) i0 }" a
Five EC Standard Commands can be processed by hardware
8 \$ x& p- V% L# M ACPI Specification 2.0 compliant6 v7 m7 A8 h" ?0 `( E$ J
Support customer command by firmware0 H l. ` z! ^/ E( u
Programmable EC I/O port addressing (default 62h/66h)2 \7 z1 r9 W1 u" T4 ]6 \
3 V! h% X' L* e5 b* g2 ^7 Z O3 kAnalog To Digital Converter (ADC)+ b! m5 k1 q0 [/ _9 R& e6 A1 z
6 built-in ADCs with 8-bit resolution.6 R* G! Q: n) r2 d6 M( S( u* c! m
The ADC pins can be alternatively configured as General Purpose Inputs (GPI).
4 L/ X# J# C Q# q
& Q/ m+ V7 k {+ q) UPulse Width Modulator (PWM)8 F/ t' C+ E. |+ i
5 built-in PWMs
; p* u! H* r9 U3 N Selectable clock sources: 1MHz/64KHz/4KHz/256Hz.
: D' q' ~1 N% G2 R Configurable cycle time (up to 1 sec) and duty cycle.$ b$ a8 v* ]# O/ c: s; L Y
; Y `! X% u- p' K+ gWatchdog Timer (WDT)
$ r4 }% o/ n. v% D! G' u 32.768KHz input clock with 20-bit time scale.9 d1 M& P9 {& X {- j, S' ^3 R
8-bit watchdog timer interrupt and reset setting
" Q7 K" w- t- h' n2 A
' n/ A! P' o5 JGeneral Purpose Timer (GPT): b" b" I! |) u- x3 H+ ?
Two 16-bit, two 8-bit general purpose timers with 32.768KHz resolution, U8 k9 L: h' D
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General Purpose Wake-Up (GPWU): t {5 E1 n; x# \! i' x" X5 n' M
All General Purpose Input pins can be configured to generate interrupts or wake-up event.
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2 H7 i: j: w: ]4 mGeneral Purpose Input/Output (GPIO)+ K' D0 M& n& p! g
All I/O pins are bi-direction and configurable9 D( G6 L0 [/ } k, e) n p
All outputs can be optionally tri-stated
* z+ U- y! K8 {% G+ E4 p n All inputs equipped with pull-up, high/low active, edge/level trigger selection9 A6 z* M1 t" A( b- O& E: Q
All GPIO pins are bi-direction, input and output.
7 |5 C% o* d$ |, `8 A6 }) |4 @" I Max. 43 GPIOs' ?' {! ^& r; g" @! I8 L: w3 j, b
y& `, _$ e. T9 xPower Management& h% E3 O, p% l- s" d
Sleep State: 8051 Program Counter (PC) stopped: l8 t' D7 }2 L6 B" D* [* m( @
Deep Sleep State: Stop all internal clocks. Target power consumption ~10uA.
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" W1 Z8 N) k- Y0 t8 S% XTotal Pages: 40 |
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