|
|
Feature Summary' ?7 D2 g" i7 a" Z
! ?: q% k9 Z! `/ y& W; ?
Low Pin Count Host Interface (LPC)
/ k6 `. |1 |* K+ N0 g, D3 _ SIRQ supporting IRQ1, IRQ12, SCI; U& \9 }# g4 E/ T
I/O Address Decoding:
. X y* k. f$ u2 N% z KBC IO Port 60h/64h1 a. l0 n) j: X- h1 b
Programmable EC IO Port 62h/66h and 68h/6Ch& s7 C; w% m$ H6 s! d' d$ P/ f
Programmable 4-byte Index I/O ports to access internal registers
0 U( |/ g6 e3 b/ z, A0 c One Programmable I/O write byte-address decoding0 G4 s* j8 E6 b
& U: J; Z8 v9 P2 B
X-Bus Interface (XBI)
4 B% K% N( n2 P8 E SPI Flash support, the operation frequency runs at least 50MHz.* _5 T, f6 o: J5 s4 K
Addressable Memory range up to 24MB.
/ W3 W( H! {8 G L8 l0 q 8051 64KB code memory can be mapped into 4 independent 16KB pages.7 K: n- ^# N, D
% W; |# c1 H! X5 {3 s) C8051 Microprocessor
/ i5 T% P/ T0 n4 f' D. C Industry 8051 Instruction set complaint with 3~5 cycles per instruction.- v5 f% C x. _0 I* \. l3 `4 g
Programmable 8/16/32 MHz clock; E; u( @- j+ X2 p8 }# }
Fast instruction fetching from XBI Interface: v0 N+ O( i* {+ I7 d
128 bytes and 2KB tightly-coupled SRAM z$ `8 q1 M% i; y- M
24 extended interrupt sources.- E& n8 P3 s4 k
Two 16-bit tightly-coupled timer! }9 B/ C0 W# n# S K1 q7 @
' _! ~4 {, R p8 H
8042 Keyboard Controller" G6 |, T$ Y8 s# X2 ?; \
8 Standard keyboard commands processed by hardware; C- ?' V, |6 Y5 h
Each hardware command can be optionally processed by firmware$ J N: P- I6 ]; a! j$ f
3 O0 D5 c2 F0 v6 q, L( ~Embedded Controller (EC)
' o7 v! s# P, p. f- \* R, q' Y! N Five EC Standard Commands can be processed by hardware, `( B* A" @! q/ r+ Z/ c, X' b
ACPI Specification 2.0 compliant
4 E) i1 j5 ?& q2 M4 F8 d Support customer command by firmware( C; ~1 V5 q* ?5 p0 G# X% a2 }! `
Programmable EC I/O port addressing (default 62h/66h) C+ B- H9 k$ k/ H; ]) _, T
# y# P) _& v5 V0 W) D$ l
Analog To Digital Converter (ADC)& P3 ~4 {! w8 K5 _/ z! }* b- ?6 b$ J
6 built-in ADCs with 8-bit resolution.
1 H7 ?, |7 V! R The ADC pins can be alternatively configured as General Purpose Inputs (GPI).+ v# D% N* t" m4 u
" w3 s7 U7 k: A# t- J0 O
Pulse Width Modulator (PWM)
7 g. z0 {5 j. V, H 5 built-in PWMs K( G' |. {4 L2 i4 A
Selectable clock sources: 1MHz/64KHz/4KHz/256Hz.
' V+ @$ m% ? `' X5 Z$ E/ B7 w" c Configurable cycle time (up to 1 sec) and duty cycle./ |' X- n' Q& N3 K* L( n9 y. h
' g2 H/ e' k; _" f- ~4 g
Watchdog Timer (WDT) j# h/ G* h$ s8 J9 H- ~& Z; U
32.768KHz input clock with 20-bit time scale.2 y- J- p/ E( T7 |0 {7 I# @$ e
8-bit watchdog timer interrupt and reset setting
_/ c8 r" n) J1 Y% F# y2 K7 y
5 [0 z' X/ _3 v3 ?0 m; RGeneral Purpose Timer (GPT) n/ R9 n/ V7 C/ x
Two 16-bit, two 8-bit general purpose timers with 32.768KHz resolution6 x6 S1 `, ?4 ]. a' U! V
V f$ ^7 U" G" ]8 }
General Purpose Wake-Up (GPWU)
7 j* R) J3 h, \; |7 }! A All General Purpose Input pins can be configured to generate interrupts or wake-up event.2 A7 ^' [. P% } _- X. ~! f
/ m& u" c- T; M
General Purpose Input/Output (GPIO)
4 U E3 i1 ^; W/ E3 C" U All I/O pins are bi-direction and configurable% |9 @! E$ s6 a
All outputs can be optionally tri-stated& Y) D6 n7 K/ S9 V( H$ ~/ O" Z
All inputs equipped with pull-up, high/low active, edge/level trigger selection7 D) J) k% P% Y! g; I3 ?& U' F
All GPIO pins are bi-direction, input and output.
/ v4 K, p2 u$ _. d7 N Max. 43 GPIOs& E7 [; {- q) @/ U& F
+ v9 K9 V. w# B7 Q" K
Power Management
0 x+ o6 l# n5 \4 @$ X" K Sleep State: 8051 Program Counter (PC) stopped
0 P( d4 r( s4 A Deep Sleep State: Stop all internal clocks. Target power consumption ~10uA.1 a# d7 v/ m4 j5 V( X
( h g* o/ p1 M/ u C. N$ o0 pTotal Pages: 40 |
本帖子中包含更多资源
您需要 登录 才可以下载或查看,没有账号?加入计匠网
×
|