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ENE KB3700 Keyboard Controller Datasheet R0.1 2006

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发表于 2007-12-21 18:08:39 | 显示全部楼层 |阅读模式
Feature Summary& m0 q7 P8 @$ v7 a/ U
8 c0 l) H5 F1 E3 n! Z: y7 x& R
Low Pin Count Host Interface (LPC)
5 ~8 i1 G/ E, N  SIRQ supporting IRQ1, IRQ12, SCI
. v! t( D, b, g; `0 b9 z  I/O Address Decoding:2 @1 T  H( {' l' _0 S! S
  KBC IO Port 60h/64h& E1 R4 Z3 P9 q) Q5 F1 t- [
  Programmable EC IO Port 62h/66h and 68h/6Ch
/ m  v' J3 V9 {' \  Programmable 4-byte Index I/O ports to access internal registers
1 Z6 T" j" ~2 I* a. k  One Programmable I/O write byte-address decoding! w* K1 s( S- b7 M+ E/ L

9 _& Y. W7 J; |+ g; TX-Bus Interface (XBI)
! H' q- R- W8 {9 ^: h( L. B  SPI Flash support, the operation frequency runs at least 50MHz.6 ?* f. k" C* P
  Addressable Memory range up to 24MB.; T: p8 y7 \% B" R# O
  8051 64KB code memory can be mapped into 4 independent 16KB pages.) e3 a" V" B- U7 M( j; P8 r

+ F- Q0 E- e0 ~  {/ K: y0 g, y0 W9 ~: y8051 Microprocessor
  h( }" k- ?: Z" q& o' U# q  Industry 8051 Instruction set complaint with 3~5 cycles per instruction.3 N! Y. W8 u7 @% J# l- n
  Programmable 8/16/32 MHz clock. M" N1 p# Y' c& J! J) p
  Fast instruction fetching from XBI Interface
% `  o  c0 \" C% R) q  128 bytes and 2KB tightly-coupled SRAM
, G* d! I+ V' x# Q7 Y  24 extended interrupt sources.: `, I- a+ |. C, h9 S5 b
  Two 16-bit tightly-coupled timer
8 a  j+ q3 u7 f* w9 g5 y5 D2 F' b: u
8042 Keyboard Controller
" |7 A2 k; T5 l, N& f, w$ o. e  8 Standard keyboard commands processed by hardware, p( B& A/ g% ^" c; @! G* _( C+ o% J
  Each hardware command can be optionally processed by firmware6 ~6 T) W+ E3 p) A0 H

% |* E5 h3 O$ B* y2 aEmbedded Controller (EC)% }4 `& k/ s4 _3 u3 W- g1 y
  Five EC Standard Commands can be processed by hardware* a) N9 W9 v7 E
  ACPI Specification 2.0 compliant
4 Q+ t7 ?! x* ], d; m  Support customer command by firmware
, T5 C) V$ ~, j/ j" _  Programmable EC I/O port addressing (default 62h/66h)6 P2 s- K- Y% O1 J& X" G2 X
+ _% D2 [% N5 ?) |
Analog To Digital Converter (ADC)
9 X) R6 z3 ~; Q$ Z  6 built-in ADCs with 8-bit resolution.
8 B* a7 X/ F8 \, w" A  The ADC pins can be alternatively configured as General Purpose Inputs (GPI).3 v; h1 {; Q% |- p5 w, `
3 l/ K  R6 @- A; g( T- B
Pulse Width Modulator (PWM)# |1 D: V4 i* K' w2 M8 h
  5 built-in PWMs: p5 G, r5 \9 }; _; i
  Selectable clock sources: 1MHz/64KHz/4KHz/256Hz.
: E8 a' s/ r/ O. O, H% I  H  Configurable cycle time (up to 1 sec) and duty cycle., y  x+ ]) Q1 M& v
5 i& A6 n7 y* l+ O6 j  T$ }
Watchdog Timer (WDT)# Y9 U3 G  Z) n
  32.768KHz input clock with 20-bit time scale.
- f9 \# `# K, C+ \9 V  8-bit watchdog timer interrupt and reset setting
: p4 H* H% L; R& W/ U4 j
* G1 w1 ^! T- k; \2 dGeneral Purpose Timer (GPT)- a: i: o8 x1 ~% y1 y' k
  Two 16-bit, two 8-bit general purpose timers with 32.768KHz resolution+ U6 P+ |9 h7 l

5 j7 S! E4 c( [6 _$ SGeneral Purpose Wake-Up (GPWU)# v0 [# e' K" ]! ?! M
  All General Purpose Input pins can be configured to generate interrupts or wake-up event.) ?; a4 W8 a. E' f7 b
# C: G/ g* U' k( Q% a/ \; }3 J2 [
General Purpose Input/Output (GPIO)
! \3 g+ J9 C2 |" q) x0 k3 Z6 e  All I/O pins are bi-direction and configurable
% ^% c5 N# j0 i% K" g3 v  All outputs can be optionally tri-stated
2 d7 l# E3 m! c5 n  All inputs equipped with pull-up, high/low active, edge/level trigger selection
7 D) [* b# j2 n% ?) W  All GPIO pins are bi-direction, input and output., @- N, }. ^) J( F; v6 O9 V
  Max. 43 GPIOs
* H1 W. q! s: i6 l8 H
: E) i  C+ z5 j% i0 ?" pPower Management
1 j& M$ O/ ^5 u* ~  Sleep State: 8051 Program Counter (PC) stopped4 n  h5 Q2 M/ u$ s( X- Q
  Deep Sleep State: Stop all internal clocks. Target power consumption ~10uA.
2 j% S; j2 A* X" [/ U& J7 _
3 n5 ~( u7 Y9 p, q0 T4 uTotal Pages: 40

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发表于 2008-12-4 12:05:57 | 显示全部楼层
many thanks! 有KB3310的DATASHEET吗?
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发表于 2008-12-4 16:10:26 | 显示全部楼层
Thanks a lot
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发表于 2009-4-9 15:27:40 | 显示全部楼层
这个SPEC还是太简单了,谁知道ENE在用SPI ROM时,prefetch的cache有多大?如果spi run over 50Mhz,我看到它的8051处理指令需要3~5个cycles,而且听说ENE用的免费的C code,那么你们在用的时候感觉perfermance怎么样?特别是处理PS2 device的时候。
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