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ENE KB3700 Keyboard Controller Datasheet R0.1 2006

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发表于 2007-12-21 18:08:39 | 显示全部楼层 |阅读模式
Feature Summary, P3 c, B' s* M

5 t5 e) c9 O; j+ y  K4 sLow Pin Count Host Interface (LPC)2 V  T& l) x( P7 b  t& t
  SIRQ supporting IRQ1, IRQ12, SCI
. e/ _& @( l; H$ d  I/O Address Decoding:. M& \: N3 g- `7 c; b# N$ b
  KBC IO Port 60h/64h
0 U1 F- C2 |* h" A' c- }% n  Programmable EC IO Port 62h/66h and 68h/6Ch
# b$ N) N& i3 g8 H  Programmable 4-byte Index I/O ports to access internal registers! @! U/ l* A+ ]4 `/ r1 Z
  One Programmable I/O write byte-address decoding/ N% U$ P' ^: V3 C0 M8 V: `% Y, R% R4 g

9 x& b7 w9 l. h  {+ \" mX-Bus Interface (XBI)% z' E- Q! ?3 i& L4 E; N- c2 c
  SPI Flash support, the operation frequency runs at least 50MHz.0 ^" c5 ]6 p4 n# k/ x
  Addressable Memory range up to 24MB.3 A7 @+ a. ]+ T5 c  G$ A# h
  8051 64KB code memory can be mapped into 4 independent 16KB pages." I* r0 K' a( p- u( p' s7 h
! K( `: v% f+ z) |3 J6 m
8051 Microprocessor
6 `8 ?! z* j6 g( \  Industry 8051 Instruction set complaint with 3~5 cycles per instruction.
% X: C" ^; _- f. `) n  Programmable 8/16/32 MHz clock
( l" O- C% u+ R/ q  ^% N  Fast instruction fetching from XBI Interface1 T9 s: Y0 q+ U5 d6 n
  128 bytes and 2KB tightly-coupled SRAM
* i: N  `) ~5 {, ^& Y& h, C7 K  24 extended interrupt sources." L5 O& S" Q6 M' B% K# {
  Two 16-bit tightly-coupled timer
7 G# a; v2 g8 W0 H1 R
9 y" ^4 `, p5 Q+ I8042 Keyboard Controller2 A0 G& X5 j- t% B3 d0 g
  8 Standard keyboard commands processed by hardware
; k- @4 j* F) a. V  Each hardware command can be optionally processed by firmware
0 K$ G! I5 I& O" M* c# L' X1 ]
$ h9 N9 e7 H: Z* n6 yEmbedded Controller (EC)
0 J: d0 P/ @% }' M( y( B  Five EC Standard Commands can be processed by hardware
+ w+ o' S1 c* c  ACPI Specification 2.0 compliant
/ c7 v! @+ d9 n  Support customer command by firmware
! n, ?& T" z6 w& O  Programmable EC I/O port addressing (default 62h/66h)
' Q* r0 Y# b' c9 K. F( U" N; @* b4 e* g; O) f
Analog To Digital Converter (ADC)0 \, o' p$ j* N- W" ^
  6 built-in ADCs with 8-bit resolution.
$ e6 y4 \( l5 y5 p/ V( |5 g  The ADC pins can be alternatively configured as General Purpose Inputs (GPI).0 a! r% J3 U* y8 }

4 X- P, {# |0 |2 KPulse Width Modulator (PWM)
- G6 C0 O) j3 F- S$ p, r( P  5 built-in PWMs: O" O3 M$ W. ?" O$ r
  Selectable clock sources: 1MHz/64KHz/4KHz/256Hz.  }7 t+ _. H5 I6 j" r- B; P3 z
  Configurable cycle time (up to 1 sec) and duty cycle.
% w# s9 X3 A* `+ o  D- }/ W( }$ V8 U9 N, o8 D$ `
Watchdog Timer (WDT)/ S8 r2 q( }3 y& N+ O
  32.768KHz input clock with 20-bit time scale.& B$ {3 }( K7 A3 {- U
  8-bit watchdog timer interrupt and reset setting' B9 n2 X  c- x

6 b( J% d* p  ^8 rGeneral Purpose Timer (GPT)
( \. Z, m' A' V, I) M! w- F  Two 16-bit, two 8-bit general purpose timers with 32.768KHz resolution
5 C3 R- p9 E$ H) S1 s. [1 D% ~) h5 f: r
General Purpose Wake-Up (GPWU)- F4 L* ~& v* {9 z
  All General Purpose Input pins can be configured to generate interrupts or wake-up event.! Z* ]( u; M: ^, ~
5 G: |. n; Y+ I6 I
General Purpose Input/Output (GPIO)
5 m" G4 f' F4 [& ~& H  All I/O pins are bi-direction and configurable
7 O* x2 C& G2 r/ ~  All outputs can be optionally tri-stated8 L9 h# `! m  C
  All inputs equipped with pull-up, high/low active, edge/level trigger selection
* Z, E6 S9 O! j# m8 s% w' X, m& Y7 L  All GPIO pins are bi-direction, input and output.; _' o  O: s& P/ g* L* n
  Max. 43 GPIOs' [% N. d+ G6 R5 I7 P# k1 i

5 u# B+ a$ J' U9 E; v8 \Power Management6 @- l) I9 J: ]1 ^. d; u
  Sleep State: 8051 Program Counter (PC) stopped: D- K+ B7 n! E! g
  Deep Sleep State: Stop all internal clocks. Target power consumption ~10uA.
; e! R0 N3 M+ f9 A
- p- B/ b9 ~" H" v/ W& }1 d$ p# ?Total Pages: 40

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发表于 2008-12-4 12:05:57 | 显示全部楼层
many thanks! 有KB3310的DATASHEET吗?
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发表于 2008-12-4 16:10:26 | 显示全部楼层
Thanks a lot
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发表于 2009-4-9 15:27:40 | 显示全部楼层
这个SPEC还是太简单了,谁知道ENE在用SPI ROM时,prefetch的cache有多大?如果spi run over 50Mhz,我看到它的8051处理指令需要3~5个cycles,而且听说ENE用的免费的C code,那么你们在用的时候感觉perfermance怎么样?特别是处理PS2 device的时候。
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