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Feature Summary
0 B+ T$ k/ t) C+ V) G* L2 A) S- G# C A
Low Pin Count Host Interface (LPC)/ W' k+ t) F# t- `7 L0 p* {/ H
SIRQ supporting IRQ1, IRQ12, SCI& |4 l1 r" r2 m g( h1 S" g: W% ` ?
I/O Address Decoding:
' L% [" x# ?- u: i4 |8 Z KBC IO Port 60h/64h
5 W! |; H4 x/ k( O6 I4 y* _0 I Programmable EC IO Port 62h/66h and 68h/6Ch
" Y, o2 g& Z$ S* g Programmable 4-byte Index I/O ports to access internal registers! @) V6 R# q" }8 u4 a
One Programmable I/O write byte-address decoding
/ ^0 _% I% }7 `1 L/ U" ~; C, T1 Q0 K) n6 ]2 x2 b" }
X-Bus Interface (XBI)+ x$ `' k8 q3 [
SPI Flash support, the operation frequency runs at least 50MHz.
, R2 Q2 L% M5 N- N9 b8 f& F8 \6 c, R Addressable Memory range up to 24MB.
l7 `, O# n: }1 G 8051 64KB code memory can be mapped into 4 independent 16KB pages.- j* ]6 G2 q. b* |" y/ R
, L1 U+ C( {7 s8051 Microprocessor0 F" r# d7 _! G
Industry 8051 Instruction set complaint with 3~5 cycles per instruction.
+ [- M5 l8 o0 l& B! a3 O Programmable 8/16/32 MHz clock
) h5 |0 \4 _8 H! d$ M Fast instruction fetching from XBI Interface0 W2 \) w @$ P$ f; F* o/ K6 k3 l
128 bytes and 2KB tightly-coupled SRAM+ V1 n7 j# O* U" }# L! T- A# u
24 extended interrupt sources.1 w! ?$ Z& Z1 V+ i/ B$ T# p* Q
Two 16-bit tightly-coupled timer
C8 U w6 n# ]( o! ]% a' s; l( N" s% u
8042 Keyboard Controller
# {5 ]+ c7 P+ q- C 8 Standard keyboard commands processed by hardware
+ W- T5 e, _" \$ S, F1 o' g Each hardware command can be optionally processed by firmware$ ~% z5 ~. |% h
! T- o/ w, ?0 v# e/ {" ?
Embedded Controller (EC)
. e& B6 Z, \- H$ b# r' `% Q8 d6 C Five EC Standard Commands can be processed by hardware) g4 M/ p: V* `. f6 }) h
ACPI Specification 2.0 compliant
4 V9 w$ C6 n ]4 J7 F# Z8 j Support customer command by firmware
% m) s) m0 p8 s: f* i/ i Programmable EC I/O port addressing (default 62h/66h)
9 Y, E+ D9 |: u2 S) P" d6 w ~. Q! e. d7 D
Analog To Digital Converter (ADC)
8 H& y. M& e# G! j; K, m3 p' Z& h 6 built-in ADCs with 8-bit resolution.
' W& b$ h) i$ k& W The ADC pins can be alternatively configured as General Purpose Inputs (GPI)./ n; W8 n3 _# J2 e; b2 ]
! p& s9 y, t: Z
Pulse Width Modulator (PWM)
8 L3 T. w# v8 _ d 5 built-in PWMs9 H1 K" G/ o' Y) t1 b1 T+ B
Selectable clock sources: 1MHz/64KHz/4KHz/256Hz.
) o9 q) D1 E T P. y Configurable cycle time (up to 1 sec) and duty cycle.
" f9 X( ]* O, k8 G1 ^$ b, C4 N) X6 S2 Z* x7 G- l
Watchdog Timer (WDT)
+ d" X7 k) X$ P2 k/ T' v 32.768KHz input clock with 20-bit time scale.
2 ~2 q& ^6 Y" X% i: ?/ C& ` 8-bit watchdog timer interrupt and reset setting% V/ j5 I3 A- d- w5 Y) u; n8 [% T
% p+ g. n6 b* D' V0 S
General Purpose Timer (GPT)
9 l2 h& y2 B; q+ k/ H3 Y2 [: r% x Two 16-bit, two 8-bit general purpose timers with 32.768KHz resolution; i# _& G4 \& o3 P3 A
5 _! O( i; Y j S' i
General Purpose Wake-Up (GPWU)- i1 a4 N5 p0 l# D- ?4 ]1 n2 g9 b; w
All General Purpose Input pins can be configured to generate interrupts or wake-up event.# N5 O/ N {* h0 d4 e
# ?1 B. X6 F/ z( d' ^ [# jGeneral Purpose Input/Output (GPIO)
8 B" k& b+ W$ ]/ S+ Y. \ All I/O pins are bi-direction and configurable
- m0 O0 a$ m% j" \- b4 \ All outputs can be optionally tri-stated
" P, y# L6 R9 o# m3 L All inputs equipped with pull-up, high/low active, edge/level trigger selection, O9 s6 h" ?) P2 R$ S3 g
All GPIO pins are bi-direction, input and output.
! I) ]; B3 @" M9 V7 D7 E9 {9 i Max. 43 GPIOs8 ]1 z4 {( J5 w. r
0 M/ _) U5 Q) j% _2 `
Power Management
1 B% B: B" F: u/ F2 _5 [- P Sleep State: 8051 Program Counter (PC) stopped
& m! f; [# c; W Deep Sleep State: Stop all internal clocks. Target power consumption ~10uA.
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" z( o: E+ W- W) ^7 O+ |Total Pages: 40 |
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