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Feature Summary' r, X$ W, z) _9 @9 V* } N
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Low Pin Count Host Interface (LPC)1 W8 l8 a, E9 h$ T
SIRQ supporting IRQ1, IRQ12, SCI
4 ]( S9 ]6 A. ?- K' ~( h9 j I/O Address Decoding:7 {& Q8 i2 ~2 L; O' R
KBC IO Port 60h/64h3 V% v" o/ u9 }! e! a
Programmable EC IO Port 62h/66h and 68h/6Ch
+ j0 s0 N# }# Z Programmable 4-byte Index I/O ports to access internal registers2 C, o$ q2 h% l1 w2 {" |7 }
One Programmable I/O write byte-address decoding
N( G& S2 B1 p3 g) \* a1 F% N7 V
6 S6 B+ G S' x4 l1 z9 J4 [) YX-Bus Interface (XBI)) [ B: k- Z! N/ t7 t: `
SPI Flash support, the operation frequency runs at least 50MHz.( ] |- g; F7 y/ B; P
Addressable Memory range up to 24MB.
4 Q/ e0 C- c, b l 8051 64KB code memory can be mapped into 4 independent 16KB pages.
# q, u ~( v& B" |# v/ v* f' i F
0 x+ y* `/ B. \' P, S8 X8051 Microprocessor
4 X* |6 v V% O8 `5 ~: O3 |6 ` Industry 8051 Instruction set complaint with 3~5 cycles per instruction.% X! T; v, T2 |& `8 f' U- O
Programmable 8/16/32 MHz clock9 Y$ \ R6 O6 w I5 G8 z, @9 f% D; b
Fast instruction fetching from XBI Interface: S) u6 c' ]6 H0 I) J+ T/ Z
128 bytes and 2KB tightly-coupled SRAM
7 z: U4 |8 W% S 24 extended interrupt sources.! _6 M8 F/ L; ] y
Two 16-bit tightly-coupled timer' q, q, a6 ?8 z/ N' H% Y& p* q
1 I" R8 Y* ?8 e7 L( ^+ r
8042 Keyboard Controller1 M! \( ~2 ~, P4 `: s; {
8 Standard keyboard commands processed by hardware" I% A( k; E3 H3 Y
Each hardware command can be optionally processed by firmware/ l4 O4 o1 _# V3 B# Q- G: v
1 E8 o7 P H" c- e9 Y" aEmbedded Controller (EC) w! q4 v6 Q: y0 B# k8 i+ F
Five EC Standard Commands can be processed by hardware9 X V( Q: M0 ^8 V3 c
ACPI Specification 2.0 compliant& c- W0 I" ~8 ~$ J2 _
Support customer command by firmware
" W" f* x) r2 }' b! A Programmable EC I/O port addressing (default 62h/66h) M" D- N* Z- q- I" m% g
, C! T' B: ]" n. u' v5 fAnalog To Digital Converter (ADC)
5 A* K( }9 L6 B4 y; j: D 6 built-in ADCs with 8-bit resolution.
% V; G7 ?6 J4 @& _, R/ T; ^% ^5 L# C The ADC pins can be alternatively configured as General Purpose Inputs (GPI).
1 o2 q) ]8 j# |0 K
( c0 Q# m2 l$ h5 @- s) JPulse Width Modulator (PWM)
5 \9 W3 E- {, ]4 Z 5 built-in PWMs
9 F% Q1 c1 S0 O# r' b* ] V! F Selectable clock sources: 1MHz/64KHz/4KHz/256Hz.) ]3 v- d2 n8 E- @$ S- X
Configurable cycle time (up to 1 sec) and duty cycle.
+ p I- a8 b h5 B, d) J5 ^. j1 W( `( V p" ~1 n) T. ^4 _* J& z
Watchdog Timer (WDT)
: H6 N+ m W* s2 @9 g2 @ 32.768KHz input clock with 20-bit time scale.$ a" T2 {+ f& ` L9 T
8-bit watchdog timer interrupt and reset setting
2 [" u! V4 X" j9 D/ ^; B: Q) p$ p) I3 W' h# ]
General Purpose Timer (GPT)
, m6 r' l; D" t2 M+ K1 {, K Two 16-bit, two 8-bit general purpose timers with 32.768KHz resolution
: @$ P0 `* C- G Z, M8 S4 O" P: `4 V5 A
General Purpose Wake-Up (GPWU), J/ c, w, q- }- H5 k
All General Purpose Input pins can be configured to generate interrupts or wake-up event.
A3 L6 @; j# g" e+ _
( |, i' u. C% SGeneral Purpose Input/Output (GPIO)
% O& I' K/ A$ P All I/O pins are bi-direction and configurable1 Y8 [/ ~, K) ~- v# ~# [2 J& \
All outputs can be optionally tri-stated
" O" u( M! a2 \/ t% v All inputs equipped with pull-up, high/low active, edge/level trigger selection$ e3 Z* R6 g% S* H9 x! n X
All GPIO pins are bi-direction, input and output.
% Q! r; ]! n( v3 u w" g! N, t Max. 43 GPIOs
! }$ u \0 A6 }3 p1 p0 q
6 X+ F4 G" a" {Power Management0 Y( j; d* \& {; d
Sleep State: 8051 Program Counter (PC) stopped
# V; Y0 _5 ]- g; A G* L Deep Sleep State: Stop all internal clocks. Target power consumption ~10uA.
4 ^9 M$ X3 K X d9 g
6 \4 S/ W# r% C5 s5 p0 j' LTotal Pages: 40 |
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