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CPU Reset 后的前100多条指令
8 d9 F* X# H1 {3 s2 }测试平台: Intel Menlow Crown Bench CRB" [) D i2 p/ z6 r, M {- B& I
BIOS: 自带的 AMI BIOS
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Below is the instruction and registers when CPU reset9 v1 J9 ^* l: v! v
F000:0000FFF0 EAAAFF00F0 JMP far16 ptr f000:0000ffaa
* S; B3 { U2 Z' u' ^- N3 jEAX = 00000000: AX=0000 AH=00 AL=00
& \( M4 A- `8 v& c. K0 x" jEBX = 00000000: BX=0000 BH=00 BL=00 $ B c. E3 {, K' D) B n/ z* a
ECX = 00000000: CX=0000 CH=00 CL=00
% o6 @) C p1 z3 A" I) v; wEDX = 000106C0: DX=06C0 DH=06 DL=C0 % ?0 r7 r& i6 m/ N' o% [
EBP = 00000000: BP=0000 . G @ F+ r, x- g, U: j- ?
ESI = 00000000: SI=0000 , g: m% B, T' Z( l
EDI = 00000000: DI=0000
7 V! Q' |* [# n3 AESP = 00000000: SP=0000 1 `1 P) V: b7 z0 @+ i! T
CS = F000
$ J# N3 \* B6 l; R$ ?# Z. h0 ADS = 0000
( r! ^1 N2 {- _. U% D8 dSS = 0000
7 {" n9 u, o- u7 q. TES = 0000% d# M# d" j0 t
FS = 0000, g3 O" t+ d% T6 v
GS = 0000
+ g: e/ _0 Q* m' U BEIP = 0000FFF0: IP=FFF0 2 f( w# \3 r2 {" q/ C: \
EFLAGS = 00000002: FLAGS=0002 ID=0 VIP=0 VIF=0 AC=0 VM=0 RF=0 NT=0 IOPL=0 OF=0 DF=0 INF=0 TF=0 SF=0 ZF=0 AF=0 PF=0 CF=0
s. n6 N0 j% v' B, n2 uCR0 = 60000010: PG=0 CD=1 NW=1 AM=0 WP=0 NE=0 ET=1 TS=0 EM=0 MP=0 PE=0
; L7 Z- S2 X1 d$ ?, yCR2 = 000000006 [5 `0 |. y L
CR3 = 00000000: PCD=0 PWT=0 3 m! R% g# ?, C1 k8 z1 ^
CR4 = 00000000: VMXE=0 OSXMMEXCPT=0 OSFXSR=0 PCE=0 PGE=0 MCE=0 PSE=0 PAE=0 DE=0 TSD=0 PVI=0 VME=0
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& \( ?( l: {1 K1 [Instruction for CPU step 005 p4 e) [6 i* J5 x# y* \. x
F000:FFAA E9C300 JMP near16 ptr 0070
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Instruction for CPU step 019 Z( D$ X( Z! I
F000:0070 E9FD01 JMP near16 ptr 0270
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6 ?" V0 ]) H; D) mInstruction for CPU step 02( N) [ }. O' z% H" R
F000:0270 FA CLI
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Instruction for CPU step 03
, U% Z8 `% q- o& W# J& h/ jF000:0271 FC CLD
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Instruction for CPU step 04
; m0 T8 h- b& H6 UF000:0272 668BE0 MOV ESP,EAX
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Instruction for CPU step 05
% b+ e8 R4 H UF000:0275 8CC8 MOV AX,CS 0 g- `" G7 i# f8 |0 T7 a% ~8 g- f
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Instruction for CPU step 06
2 D5 d4 j4 Z2 {F000:0277 8ED0 MOV SS,AX
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Instruction for CPU step 079 E. B' G* C- [$ O( K+ I* f
F000:027C E957FE JMP near16 ptr 00d6
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Instruction for CPU step 08
2 y- H) ]2 H0 w) kF000:00D6 E9A601 JMP near16 ptr 027f7 ]/ R Z q% Z- @' W
$ {! p& ]" }$ G7 r7 b# IInstruction for CPU step 09
* y. q, v; m! P/ i# bF000:027F B0D0 MOV AL,d0 - \1 q; |& E4 u' a) t& `0 Y' F2 C
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Instruction for CPU step 10
" U6 N3 H) }' e, LF000:0281 E680 OUT 80,AL ) `' \% ^5 ^) b! C, m) y8 _& F. F9 I
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Instruction for CPU step 11# `' f: G* {: N5 p
F000:0283 BF8902 MOV DI,0289 5 P. u+ }; t) \2 D6 N" c: F5 H
9 i9 G% @/ E! ?& K, `( n1 q* z0 uInstruction for CPU step 12
8 e# I+ s7 r% r$ s+ d( Z: C! dF000:0286 E9AE06 JMP near16 ptr 0937( Z, {1 P1 [, |- g
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Instruction for CPU step 13
$ h* D! K& P T& C4 R" K8 PF000:0937 0F08 INVD x& c, z8 g' G# |6 n
( ?) j2 d3 p7 K; B: a, x- HInstruction for CPU step 14
+ H8 q3 y( ~0 @" CF000:0939 0F6EFF MOVD MM7,EDI 3 {5 k2 I# A+ o
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Instruction for CPU step 15" R1 Y& r: o0 F6 K2 m
F000:093C 668BC4 MOV EAX,ESP
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Instruction for CPU step 16
! H( U; Y% C1 y) pF000:093F E97C08 JMP near16 ptr 11be6 D! ^/ d) `6 D D2 \. ]- }# h
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Instruction for CPU step 178 L9 h. y, `! z) c8 \
F000:11BE E981F7 JMP near16 ptr 0942
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2 D w! V0 J4 h4 ?- q4 d4 yInstruction for CPU step 184 @* ~1 F2 [/ T- _3 E. q: R; e
F000:0942 BF4809 MOV DI,0948 ; R) Q# S2 `+ ?
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Instruction for CPU step 19
# K7 Y1 ^6 l& `8 q& k( c' s1 E! dF000:0945 E9C004 JMP near16 ptr 0e08
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Instruction for CPU step 20
+ p3 H& G4 S; @$ [# cF000:0E08 0F20C0 MOV EAX,CR0 6 H+ D" \ w/ h2 [+ f& }/ s7 r
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Instruction for CPU step 21, i9 |7 J" Y4 b0 z
F000:0E0B 660D00000060 OR EAX,60000000% z0 ^1 c4 h0 E5 q4 W
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Instruction for CPU step 22
2 B" h6 _- Q- w8 G j8 ^F000:0E11 0F22C0 MOV CR0,EAX
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Instruction for CPU step 235 r# w2 D' W/ L5 @
F000:0E14 0F09 WBINVD 8 p5 d! j1 ?: V7 m B
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Instruction for CPU step 24* R3 y: o) q+ M% b
F000:0E16 66B9FF020000 MOV ECX,000002ff' S* @4 ~* a6 k. C- W# o
1 N* H% D) \. }5 \ Q2 {Instruction for CPU step 25/ i0 G# l/ O3 d6 G9 e
F000:0E1C 0F32 RDMSR
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Instruction for CPU step 262 R# p0 \. n% j6 ~! t9 r- Y
F000:0E1E 25FFF3 AND AX,f3ff
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' j4 i, Q* p R2 XInstruction for CPU step 27
- ^8 r) X7 T- H9 P6 d0 LF000:0E21 0F30 WRMSR
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1 s- g2 F' b3 a' M5 v$ NInstruction for CPU step 28
( L( q9 B8 S4 U/ H2 E) x! @F000:0E23 0F09 WBINVD , d: j% N8 v9 v' F$ e) R3 t! a) [
) L) ~4 \$ U! {% Y s9 [Instruction for CPU step 297 T- I* \$ _7 l2 N) i$ h! k# ?+ b
F000:0E25 0F20E0 MOV EAX,CR4 6 J% L7 {7 T7 t# T3 ?/ W7 J
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Instruction for CPU step 30; p3 Z8 K) \, {
F000:0E28 247F AND AL,7f
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Instruction for CPU step 31% R1 i. [1 |# e2 g, |: J! J3 W. y, C
F000:0E2A 0F22E0 MOV CR4,EAX % C6 c. Y$ P# A
+ @, Q4 f; p+ QInstruction for CPU step 32" R6 o1 S8 J0 A. _
F000:0E2D 0F20D8 MOV EAX,CR3 & c) V# B4 M8 r0 f& Q
) h& Y4 O) A" J/ K6 Z+ q0 ?! `Instruction for CPU step 33
4 t! X- [% G7 m$ g/ LF000:0E30 0F22D8 MOV CR3,EAX ( _/ T% @2 n: V+ c& F! N5 J
6 d7 ~. R7 h& c2 ^/ \Instruction for CPU step 34+ X9 o+ o6 [9 {- A) @
F000:0E33 FFE7 JMP DI
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Instruction for CPU step 35
+ {1 a6 B0 y1 `/ d+ Q' @6 BF000:0948 66B9FE000000 MOV ECX,000000fe
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) ]3 A/ m+ w0 v. wInstruction for CPU step 36
: G) c! \) r8 g* u+ T9 s' @0 _F000:094E 0F32 RDMSR
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6 y6 I9 z0 Q& r% e! C: PInstruction for CPU step 371 z1 o6 I- w- D+ \; N
F000:0950 0FB6D8 MOVZX BX,AL ) I' J" p( I8 t$ M3 n1 c
* t+ P e* x" C# ~2 R' bInstruction for CPU step 38
4 `6 Q7 u6 e. F- d) bF000:0953 6633C0 XOR EAX,EAX
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. Q$ S: s5 f+ DInstruction for CPU step 39/ ]; ^% ? [& v/ a
F000:0956 668BD0 MOV EDX,EAX ( n9 ~" z$ G- b; k; }& E
1 b5 F- Z% d' M% L5 K7 z! a; y1 }Instruction for CPU step 40# V( p G+ \4 s' v0 n+ m+ W: y
F000:0959 B95002 MOV CX,0250
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Instruction for CPU step 41
$ W$ T% g- R% o) R; E8 l6 y% XF000:095C 0F30 WRMSR 2 w- b2 I! X, R6 K/ {3 }
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Instruction for CPU step 42" R; i% P. t8 Q7 B
F000:095E B95802 MOV CX,0258 0 I" V! x, u" w4 P2 K0 d5 l
% a A6 U4 ~8 q8 v9 g: yInstruction for CPU step 43" l' x; B+ D: e9 z, i. x* _- S9 K" m
F000:0961 0F30 WRMSR
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Instruction for CPU step 44
% ]' N5 o$ O' [ s8 _: `/ IF000:0963 B95902 MOV CX,0259
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}5 X/ @ M( J( `' wInstruction for CPU step 45
7 ?" {, ]4 ]+ A+ FF000:0966 0F30 WRMSR
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2 H* F: ?) I3 Y3 R& kInstruction for CPU step 46: e, x& M: o3 R: X e* G9 V2 l
F000:0968 B96802 MOV CX,0268 % n* {. ?$ a5 n k
" V) K4 X4 M4 W% I* Q0 H7 i# o1 kInstruction for CPU step 47+ l' n: e$ K) @5 Z
F000:096B 0F30 WRMSR
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9 M- z* p P' x N d7 q3 `Instruction for CPU step 48
: @/ b% p Q; g% D. \4 f( Z: AF000:096D B96902 MOV CX,0269 % [, F' f7 f# u; t% e( P, _) L
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Instruction for CPU step 496 L; I( i5 w2 D& W! C
F000:0970 0F30 WRMSR + `# ~% s: S. v* S# ?/ y
0 M- |, g: f3 U7 @6 H5 R) uInstruction for CPU step 50' w, Q9 n% V4 M$ a: H
F000:0972 B96A02 MOV CX,026a * N8 d# h0 W! Y" ^0 K$ _* Q
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Instruction for CPU step 51" z1 G% c4 i5 |2 G3 F5 t. Z
F000:0975 0F30 WRMSR # x4 g D1 {6 W
9 i9 ~* _& U n0 m* S1 t& KInstruction for CPU step 525 P& o$ L5 c: @0 `5 I
F000:0977 B96B02 MOV CX,026b . o0 [* g2 `; T9 |; T
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Instruction for CPU step 53& h( v0 [/ \% A! p, A& ^
F000:097A 0F30 WRMSR
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k; J9 C( B* hInstruction for CPU step 54
' L1 p: ?! c9 j2 W; RF000:097C B96C02 MOV CX,026c
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1 l0 F# V; b# qInstruction for CPU step 55
" i/ G4 J" O5 T1 Y" {" yF000:097F 0F30 WRMSR : D9 A9 E4 E( W# D% Q/ I
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Instruction for CPU step 565 H. r+ S5 U7 x. M6 B p
F000:0981 B96D02 MOV CX,026d ' i, x X, c2 }) S
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Instruction for CPU step 57
' n. x; C& m1 q+ N" ^F000:0984 0F30 WRMSR / A& J3 C- y& ~7 j1 [" r) ?
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Instruction for CPU step 58. X, m$ a8 W% K# s' N- V( ~
F000:0986 B96E02 MOV CX,026e 7 x4 U$ n6 _( X
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Instruction for CPU step 59
1 {! f1 m% g' [2 I& WF000:0989 0F30 WRMSR & }" P5 f7 Y& F7 f3 L2 j8 N
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Instruction for CPU step 609 k/ N1 z* v' q# b1 t
F000:098B B96F02 MOV CX,026f
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Instruction for CPU step 61
# O1 m3 P# t. c% KF000:098E 0F30 WRMSR
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5 u. ?9 H) D* o( u' XInstruction for CPU step 62
( Q9 ~! j* o2 i' b' l4 ]+ Q3 ]F000:0990 D1E3 SAL BX,1 ! ~) P- E* g' w- [. z9 }
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Instruction for CPU step 63
& {% l K& Z+ @- y/ O% nF000:0992 B90002 MOV CX,0200 6 }* m$ r. w+ Z+ c& n* D$ b' Y
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Instruction for CPU step 645 y1 }4 E6 I8 D" |3 F, y$ F$ y
F000:0995 4B DEC BX
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4 o% L9 f; L4 c5 ?: u9 n" Y9 zInstruction for CPU step 65
% |# k9 x! h( G0 _3 a @+ vF000:0996 0F30 WRMSR 9 I# f& e. @ S3 J+ R3 ~
2 d/ d+ N' G* {/ Y- f: ?Instruction for CPU step 66/ D/ M/ A7 S( |; S! z% `+ S
F000:0998 41 INC CX - ~6 u& T/ ?3 ~/ {' N2 ]
5 i' D8 u4 i/ Q& m& R' B7 fInstruction for CPU step 67
. b# b8 u3 _' _( ]" R$ aF000:0999 0BDB OR BX,BX # J9 Y- p& g* ]9 G# k
3 j [4 B0 p, M3 E! `Instruction for CPU step 68, V* T V, \% k5 `! }2 _3 g& t0 Q# ^
F000:099B 75F8 JNE short ptr 0995: i8 U! }$ _9 D/ V1 N
) D1 \+ D: F4 PInstruction for CPU step 69
3 E3 z% u I. y4 I: Y: P! w0 VF000:0995 4B DEC BX 2 z: u9 u' u5 m- L7 ~0 a' _
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Instruction for CPU step 708 g% I* i) B: F
F000:0996 0F30 WRMSR
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9 p0 @2 x8 f+ Z; t+ iInstruction for CPU step 71
: I1 e2 d$ i! I; ZF000:0998 41 INC CX 6 Z( l2 `6 X. H3 F: w( f1 Q4 h
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Instruction for CPU step 72
' u5 R4 f' w6 a5 O6 VF000:0999 0BDB OR BX,BX " |! M2 K9 m' a+ W2 X
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Instruction for CPU step 732 s/ ~8 h# S1 S, N; S
F000:099B 75F8 JNE short ptr 0995( U" Y. `. x& e& J
- P, F: r* Q3 n( I* AInstruction for CPU step 748 ]6 T; A; a$ Z- T
F000:0995 4B DEC BX
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5 c9 s: y% w% |4 ]3 Y w# IInstruction for CPU step 75
; t( B$ n8 V r4 a0 `F000:0996 0F30 WRMSR , W- p) a( E$ v
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Instruction for CPU step 76
5 x' m" a. G1 v2 Q3 p- UF000:0998 41 INC CX
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Instruction for CPU step 77! ^ l5 _* o3 i/ W( D, I
F000:0999 0BDB OR BX,BX 8 N) C6 |/ C1 c6 l8 Q0 h9 [& Y# D
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Instruction for CPU step 78
) {# Z& R* V z* n0 o4 z' BF000:099B 75F8 JNE short ptr 0995
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Instruction for CPU step 79
+ O2 w# ~% S0 k" I HF000:0995 4B DEC BX
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7 R% ~ I( p! o7 b3 y4 p6 kInstruction for CPU step 80' A2 z: P6 G6 m- O5 p% F; b0 B
F000:0996 0F30 WRMSR
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9 |( }: T+ p5 s( DInstruction for CPU step 81- @% H5 E m8 s4 K
F000:0998 41 INC CX 8 Q3 s/ x, f. S* r6 m5 b
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Instruction for CPU step 82
5 y/ t8 m0 r( ^4 nF000:0999 0BDB OR BX,BX * N1 y$ r9 N) }" ^; M* h
7 k+ }9 C: }. j$ D1 AInstruction for CPU step 836 W: I3 u: r! F
F000:099B 75F8 JNE short ptr 0995
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# }1 B, [ k" Y) J$ l6 xInstruction for CPU step 84
3 H, x5 |) u5 A/ C% LF000:0995 4B DEC BX
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Instruction for CPU step 85* t. [6 C# D1 |4 b8 C
F000:0996 0F30 WRMSR 2 ?0 e1 i1 T, U" O
( C2 F8 F3 M1 zInstruction for CPU step 86* G' W! c- N2 `; i' b8 n" ~/ |
F000:0998 41 INC CX
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' n$ s7 I0 Y- Z6 G3 Y; @Instruction for CPU step 87
# s: }$ E- M8 ^! h E/ AF000:0999 0BDB OR BX,BX
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Instruction for CPU step 88) J4 A2 X/ O) [& A1 c/ w( B, d
F000:099B 75F8 JNE short ptr 0995
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Instruction for CPU step 89
8 s, ~9 D) f0 i1 a0 }& N/ mF000:0995 4B DEC BX
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! O5 g% y' W7 Q: B( n$ ~Instruction for CPU step 90
6 D! Q( e. y. T' z/ |* w LF000:0996 0F30 WRMSR
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9 J' `3 L% z# QInstruction for CPU step 913 E4 o% f9 g! w: @
F000:0998 41 INC CX
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Instruction for CPU step 926 ~, ^6 ^& L; P$ Z5 t8 n- c
F000:0999 0BDB OR BX,BX $ V' v1 y- U2 c9 W
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Instruction for CPU step 93! d% [7 Q" {$ G! n2 z. c) h
F000:099B 75F8 JNE short ptr 0995
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# r& ?; U% V" I' y* G9 \Instruction for CPU step 94
7 O1 |/ H' c# E6 g# m" FF000:0995 4B DEC BX
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g" g# s9 Y9 A NInstruction for CPU step 95
5 k( M6 a7 X7 J# uF000:0996 0F30 WRMSR ! Q, V3 V* {8 S3 R# W& r O0 Y% I3 ^
7 ]' T" h! N& s5 m) @) ?Instruction for CPU step 96( |& I" \$ e* w3 d$ w$ b
F000:0998 41 INC CX ) B' V2 ]. r$ e+ `3 ]8 n
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Instruction for CPU step 977 J* \- A0 [, x7 ~& u4 Y4 E! U" E
F000:0999 0BDB OR BX,BX 1 [! ~0 W& V, w& w
5 L5 K: k2 {, M& A6 \Instruction for CPU step 98
5 w% i! i( v0 p5 q# O. Y# y! TF000:099B 75F8 JNE short ptr 09950 O: K+ D6 s/ m' x, n6 [7 ^
- F5 H/ ^8 ~" s1 {% DInstruction for CPU step 99 {+ v( `2 y& U/ F' I& K) Y
F000:0995 4B DEC BX
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Instruction for CPU step 1007 U4 Y D% U/ o: W9 x3 O
F000:0996 0F30 WRMSR : D- k, V2 @& J9 N- S
9 h. H0 a. R* }% lInstruction for CPU step 101
4 x- V( d2 V( P0 u3 T8 IF000:0998 41 INC CX 8 z! T5 T, E' U5 r" F O
+ @# o' ]3 h6 W4 q) }4 nInstruction for CPU step 1029 L6 k) s, f+ ]5 r. y# R, m% W
F000:0999 0BDB OR BX,BX . G: I) t) L9 m; l6 f7 E
" }, R4 W' \7 C/ G4 D' Q. |5 tInstruction for CPU step 1030 b' F b8 P: C/ H; ~% G1 {" e! w/ e
F000:099B 75F8 JNE short ptr 0995
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Instruction for CPU step 104
) @. {6 T) U3 c/ rF000:0995 4B DEC BX |
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