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CPU Reset 后的前100多条指令, p$ l! p) i8 \' J: P0 p7 {& W1 U
测试平台: Intel Menlow Crown Bench CRB5 o3 C. J! @0 O9 ]. [
BIOS: 自带的 AMI BIOS
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Below is the instruction and registers when CPU reset
2 N7 x# N# G8 e/ E9 _: A) |F000:0000FFF0 EAAAFF00F0 JMP far16 ptr f000:0000ffaa
6 x6 j1 U' c W6 G, D. B0 {* WEAX = 00000000: AX=0000 AH=00 AL=00 4 n7 |* i4 @; g3 C: \
EBX = 00000000: BX=0000 BH=00 BL=00
& s9 Q6 Y% V5 p5 D a1 NECX = 00000000: CX=0000 CH=00 CL=00
: V/ B; v/ b( ~$ S" aEDX = 000106C0: DX=06C0 DH=06 DL=C0 , Y6 s/ }$ Q6 y3 X- A
EBP = 00000000: BP=0000 8 D; g# r) p# j _) I: ]- E
ESI = 00000000: SI=0000 2 i2 t5 z- U2 R! q' e
EDI = 00000000: DI=0000
+ D6 E% k5 `4 ^. o) o$ J" t. g! hESP = 00000000: SP=0000
! s0 D, l% |# lCS = F000
& h4 f. S' `2 g/ gDS = 0000
5 h3 c1 m4 Y( r' Y( `SS = 00009 |7 i7 k; O* Z9 T* W* u
ES = 0000
, Q( Q- s" u. C7 i5 ]FS = 0000. \9 O! k0 p9 p' y: @4 K1 B. E
GS = 0000
: d5 d* ~& }: H+ j# F' j+ r+ SEIP = 0000FFF0: IP=FFF0
$ J# c. h0 I0 x: F0 F; v% Q( i* `EFLAGS = 00000002: FLAGS=0002 ID=0 VIP=0 VIF=0 AC=0 VM=0 RF=0 NT=0 IOPL=0 OF=0 DF=0 INF=0 TF=0 SF=0 ZF=0 AF=0 PF=0 CF=0 % B1 q+ y8 \( c0 ]) [1 d
CR0 = 60000010: PG=0 CD=1 NW=1 AM=0 WP=0 NE=0 ET=1 TS=0 EM=0 MP=0 PE=0 5 ^4 l7 t \, I/ P. P0 a+ g' Q$ i- F
CR2 = 00000000
7 a* i4 C7 Q9 h& P# o( [CR3 = 00000000: PCD=0 PWT=0 / c* A/ h5 E0 o) ]
CR4 = 00000000: VMXE=0 OSXMMEXCPT=0 OSFXSR=0 PCE=0 PGE=0 MCE=0 PSE=0 PAE=0 DE=0 TSD=0 PVI=0 VME=0
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Instruction for CPU step 005 I' [8 ?# u4 x1 ?$ _* y" _' k+ ]4 I
F000:FFAA E9C300 JMP near16 ptr 0070, ~( A& Z4 e# S: l- w. K7 K2 U6 ]
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Instruction for CPU step 01) v9 r" Z" m A: k, C
F000:0070 E9FD01 JMP near16 ptr 0270
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5 x6 {* Q: L) ~/ j3 l. SInstruction for CPU step 02
7 H: w1 W' y1 r! BF000:0270 FA CLI
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; H' g$ l2 ]+ G1 fInstruction for CPU step 03
( g P$ K, b+ V: N, q* n6 V: w' sF000:0271 FC CLD " u8 {9 M7 \" X
1 x/ K9 g' w$ }Instruction for CPU step 04, K' o) V' S; r4 I5 B( l. J( a
F000:0272 668BE0 MOV ESP,EAX " C4 k* |; h8 X% R. |# U8 a; B) f. W* r
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Instruction for CPU step 05
* h, W* K5 g* s% mF000:0275 8CC8 MOV AX,CS 7 @% R" H' `% V
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Instruction for CPU step 06
) l: x2 N3 A% ]F000:0277 8ED0 MOV SS,AX
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Instruction for CPU step 07
$ u: Z" D3 l0 ^6 iF000:027C E957FE JMP near16 ptr 00d6
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Instruction for CPU step 08
+ a2 h" B& j# y% \F000:00D6 E9A601 JMP near16 ptr 027f0 y6 p/ C- e7 Y& o2 S
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Instruction for CPU step 09
& q$ F. F: c- Z1 z, B7 T6 w: SF000:027F B0D0 MOV AL,d0 ) N* r$ g* J5 D/ ]; n0 t* a
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Instruction for CPU step 10+ b' A0 {7 V. S; @. P: G$ f$ r
F000:0281 E680 OUT 80,AL : c2 i: p9 ?3 N( L# c7 g
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Instruction for CPU step 119 A2 w% O# a: E( l5 A; J7 R+ [
F000:0283 BF8902 MOV DI,0289
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/ w. C- W Z* B5 L, Z. kInstruction for CPU step 12
% p( {" U/ A8 K/ w/ cF000:0286 E9AE06 JMP near16 ptr 0937 x K' i4 o( v2 T! a- d
5 X% _( Y7 k3 i6 L* VInstruction for CPU step 13' F3 V! a8 o# Q% f" t
F000:0937 0F08 INVD
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Instruction for CPU step 14; H2 \. |; |, {! c0 O- N) K
F000:0939 0F6EFF MOVD MM7,EDI
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2 ]: M/ B$ O w% }Instruction for CPU step 15
, u* H# d( d" l& Z/ e! U N' m5 q; UF000:093C 668BC4 MOV EAX,ESP 0 w4 M$ @3 |" E, n' W
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Instruction for CPU step 16
( s5 S# R' v' KF000:093F E97C08 JMP near16 ptr 11be: c k* o r1 {# f! _
c2 v' ^1 N/ u7 \# ]Instruction for CPU step 17
/ \9 f& I0 E4 x" s5 y3 i. nF000:11BE E981F7 JMP near16 ptr 0942
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Instruction for CPU step 18
8 o* f. [2 T- ^, o: C, NF000:0942 BF4809 MOV DI,0948
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Instruction for CPU step 19
/ `5 G9 p5 w/ X, r6 S& O& tF000:0945 E9C004 JMP near16 ptr 0e08- w+ U+ b0 ?! H, [8 A4 q
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Instruction for CPU step 20
8 a) b+ P3 F. k- s) _; i* dF000:0E08 0F20C0 MOV EAX,CR0
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& I6 \2 x9 t: H5 O n O' E! LInstruction for CPU step 21; _4 i1 y; e8 Z, U1 Z
F000:0E0B 660D00000060 OR EAX,60000000
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Instruction for CPU step 22
0 U' ~3 f+ \6 H& }F000:0E11 0F22C0 MOV CR0,EAX 9 f; b& G- [( f& `, `9 |
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Instruction for CPU step 23% D x% G" Y6 P6 O
F000:0E14 0F09 WBINVD % _- f5 B ^ i! p! k1 S& h3 z
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Instruction for CPU step 24
# h/ | ?2 Z6 `+ z. I7 ^6 d0 ~: `4 dF000:0E16 66B9FF020000 MOV ECX,000002ff1 W/ }7 |" v h7 T1 Y; C6 u
( M, a9 x/ e6 uInstruction for CPU step 25
4 a% h9 ~! k2 F+ A2 j NF000:0E1C 0F32 RDMSR
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Instruction for CPU step 26: V% L8 }1 D$ ^: Z
F000:0E1E 25FFF3 AND AX,f3ff 8 U, p; s6 D5 ^8 l3 g" H
8 h ^ `4 P0 E' S/ b! zInstruction for CPU step 275 @. N3 e: T" u- n$ F: p- U" S
F000:0E21 0F30 WRMSR 2 p3 ?0 @$ Y# N, d3 W: Q
1 ^' H! k* r P/ F9 M0 O# j! I9 bInstruction for CPU step 28- V4 b# i9 C2 R" u
F000:0E23 0F09 WBINVD ( w- J9 {* k8 V
A% |/ {: D* a5 b7 ]+ H8 TInstruction for CPU step 29
# P$ A0 Z' e" ?4 i6 ^. \F000:0E25 0F20E0 MOV EAX,CR4
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3 i# D7 O& t/ E- W! W' VInstruction for CPU step 30
4 m5 ?: v0 v3 i& a5 O) MF000:0E28 247F AND AL,7f " G6 s$ g. _1 z* y/ z" w% B3 K% J
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Instruction for CPU step 315 y1 b7 W! s+ [- T, |1 d
F000:0E2A 0F22E0 MOV CR4,EAX
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Instruction for CPU step 322 D! P# |$ }( o% |
F000:0E2D 0F20D8 MOV EAX,CR3 / e6 `' G4 M0 \
8 Q7 q: t- t0 z3 x+ U6 S- ZInstruction for CPU step 336 U- w. K; G8 R% H# A( m
F000:0E30 0F22D8 MOV CR3,EAX * {* L8 n3 A2 k
+ H3 e8 O7 k/ t- M: ^$ ^Instruction for CPU step 34
/ @* z: w+ y3 IF000:0E33 FFE7 JMP DI
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Instruction for CPU step 35 n, ^( w" a( a. X! ?% O
F000:0948 66B9FE000000 MOV ECX,000000fe
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Instruction for CPU step 364 ^ K; Z( \/ F2 K o" a
F000:094E 0F32 RDMSR ) d$ v& f' l P6 z d1 K
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Instruction for CPU step 37
; i9 N" B$ X; L% BF000:0950 0FB6D8 MOVZX BX,AL
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Instruction for CPU step 38
& d) p$ P3 _3 h$ p' \2 ]F000:0953 6633C0 XOR EAX,EAX
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. f9 _9 U6 U# s% F# A) Z- |Instruction for CPU step 39, h/ u9 I+ q2 I6 c% A- P
F000:0956 668BD0 MOV EDX,EAX % [# l8 h7 U- p# s' M* y
O, F: G( y& D' v; S4 c) t( }Instruction for CPU step 40
4 @0 `3 v8 T! m' Q5 ^+ ^F000:0959 B95002 MOV CX,0250 ) c) U/ ]1 |2 N) J2 Z# I( x7 H1 E
# p1 C. U9 J4 s) w5 UInstruction for CPU step 41
% O! ?8 k) l% K eF000:095C 0F30 WRMSR
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6 y2 h' j1 n7 hInstruction for CPU step 42
8 q2 _/ \4 ~9 A* mF000:095E B95802 MOV CX,0258 : b/ T k/ |% ?4 D& @0 p
/ H; d0 V( y+ C7 L6 h, K' [. JInstruction for CPU step 43
! F0 w: b/ D9 E. xF000:0961 0F30 WRMSR
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6 { I2 j" A, K XInstruction for CPU step 44* D6 m; i/ N; }7 d
F000:0963 B95902 MOV CX,0259
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4 p6 e# r3 R8 V' t/ r: bInstruction for CPU step 45
; f o- W" m- ]$ vF000:0966 0F30 WRMSR . Z. a: Q/ h, a/ B2 o, ^
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Instruction for CPU step 46
6 x+ z- r5 ^$ l4 b, H& R$ jF000:0968 B96802 MOV CX,0268 ! n( ]7 H8 S0 x9 y& N
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Instruction for CPU step 47
9 U; f; H: ~1 J- n1 e* F- |8 bF000:096B 0F30 WRMSR
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9 m* d7 u I4 R! c8 N2 C/ f; R( ^Instruction for CPU step 48
; I/ x6 W, P5 V' Q3 X6 v7 aF000:096D B96902 MOV CX,0269
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Instruction for CPU step 49
H3 ^& C2 E8 B" a( ]" TF000:0970 0F30 WRMSR
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2 e3 R; S! y1 S7 X6 lInstruction for CPU step 50
9 C; k4 i, R. TF000:0972 B96A02 MOV CX,026a
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Instruction for CPU step 519 a% B& h; U# N1 e
F000:0975 0F30 WRMSR
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% l& x5 Y/ _- S3 G# b0 I/ E. ZInstruction for CPU step 52: F- }& I: S3 c) w/ D
F000:0977 B96B02 MOV CX,026b
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Instruction for CPU step 53
) f0 t9 h% b, S' i+ eF000:097A 0F30 WRMSR 7 O' [5 t: S; P U# [# d
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Instruction for CPU step 54
) U1 t$ [. _3 `% SF000:097C B96C02 MOV CX,026c
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Instruction for CPU step 55
% |2 {8 L0 A3 j; a$ UF000:097F 0F30 WRMSR $ t; W: S C1 r6 @* o) I
% q+ P* n0 v' ]2 s( @- P0 S# EInstruction for CPU step 56
) H' k* h @/ \& {. B, Y$ aF000:0981 B96D02 MOV CX,026d 5 p8 }2 R7 t6 f8 w3 L0 Y
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Instruction for CPU step 57
7 t+ z: ~. J9 {F000:0984 0F30 WRMSR
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Instruction for CPU step 58 A* N0 h. i# z( [7 u
F000:0986 B96E02 MOV CX,026e
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p, v; Q+ j! D) I- y- f) m5 xInstruction for CPU step 59) d, m- O! b* E
F000:0989 0F30 WRMSR # \6 |( ]# }" s& X. X# @, V
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Instruction for CPU step 60: U" v9 {* _& s4 F
F000:098B B96F02 MOV CX,026f
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. ~ [" p7 @. a9 M& WInstruction for CPU step 61
( H: z/ |# K; V0 T6 HF000:098E 0F30 WRMSR
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Instruction for CPU step 621 ^; U& p5 n* z
F000:0990 D1E3 SAL BX,1 9 A) o% z, \/ }6 ?9 d& H' q7 ~
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Instruction for CPU step 636 S, A' J: ?' S6 X% K
F000:0992 B90002 MOV CX,0200
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Instruction for CPU step 64
; y* p2 e; G: C1 u' k! g, M4 vF000:0995 4B DEC BX
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% a7 L" i* k% Z& ZInstruction for CPU step 65/ V' A# p" I9 T7 V0 N
F000:0996 0F30 WRMSR 3 o* n! Q, S |0 z
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Instruction for CPU step 665 m) ?* [2 o4 i+ {% v) B
F000:0998 41 INC CX 0 W1 f. e- Y% y6 E7 s
l9 ?9 N7 y2 T) F2 eInstruction for CPU step 67- O- t- c1 h6 a; _1 R) x6 G" x
F000:0999 0BDB OR BX,BX ( R5 ? e- ~1 j2 f3 ~/ J
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Instruction for CPU step 68
. Q/ u: N3 z$ }& h" N wF000:099B 75F8 JNE short ptr 0995% z! b7 q7 Q9 ~
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Instruction for CPU step 69; p$ n Y1 E: H; i/ A) x
F000:0995 4B DEC BX & t I1 l1 ~+ @8 o% _
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Instruction for CPU step 70) _5 e/ O6 D& q( U
F000:0996 0F30 WRMSR ) X, ]' @* Q) n1 _0 Y7 h" @4 f
* K6 L F4 R9 S7 e" qInstruction for CPU step 71
! h# r/ P4 l' f, O) m% y4 VF000:0998 41 INC CX
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Instruction for CPU step 72: L8 O$ [7 C; m: \5 V% L6 h
F000:0999 0BDB OR BX,BX
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Instruction for CPU step 73
. T; @" O. U {, P' h: t1 dF000:099B 75F8 JNE short ptr 0995
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: M; g/ e2 l' E0 R( y4 LInstruction for CPU step 74
" f$ \9 }( R# a3 M0 Y4 }0 g7 Y, A# zF000:0995 4B DEC BX
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Instruction for CPU step 75
. j+ K& x( ?* `( O' |8 ]: eF000:0996 0F30 WRMSR 3 { T l" C: C; J* L. \3 v9 }4 U
" L: f( z4 E: n, EInstruction for CPU step 76
: T1 R$ @* }$ J! v; U3 m1 IF000:0998 41 INC CX
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Instruction for CPU step 77) O: K: J" _6 v# T
F000:0999 0BDB OR BX,BX
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% h' G2 g8 H& fInstruction for CPU step 78
! r1 e9 L& T: w) K$ [F000:099B 75F8 JNE short ptr 0995 z! d! |1 E E+ {
* H& ]6 V. t% I, m. f2 oInstruction for CPU step 79* L" b) z) t6 C0 }$ J
F000:0995 4B DEC BX
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: D- x w: X# M% ~( XInstruction for CPU step 80; f ^8 x6 {& ], E7 W8 B
F000:0996 0F30 WRMSR
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7 w& u! u# o6 w( hInstruction for CPU step 81
: N0 ~/ | a! b* g; ]' ~F000:0998 41 INC CX
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Instruction for CPU step 82
/ _% M$ {# A' J2 s8 N, xF000:0999 0BDB OR BX,BX
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+ d2 z6 @% e' N: H/ Y4 }Instruction for CPU step 83
7 A* |" F9 i) h0 dF000:099B 75F8 JNE short ptr 0995
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. H; w; |, a5 x% Q+ \1 ZInstruction for CPU step 84; H! l% ~5 D, u. K
F000:0995 4B DEC BX 2 Q: f0 P! `6 r8 t3 Z
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Instruction for CPU step 852 a: I. o& y7 x/ y _/ t ]
F000:0996 0F30 WRMSR
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2 H! r- I; A+ E1 \Instruction for CPU step 86
; j. @5 I' u2 t7 j1 C3 Y1 YF000:0998 41 INC CX " i y, h" n# t1 S N; F
6 L: L6 E2 X( |- w7 a) |+ g& i7 {Instruction for CPU step 87. r- r6 C2 y2 c0 @# R
F000:0999 0BDB OR BX,BX 7 P3 ], Q8 d, b" |% Z
; J7 S8 R, U8 Q0 n/ s& L3 BInstruction for CPU step 88
3 B" I! B6 T3 O; G0 R/ ^F000:099B 75F8 JNE short ptr 0995# u$ M! X/ n' u* ]9 ]+ r3 ~6 ]
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Instruction for CPU step 89" ~- k8 V J, F; ~
F000:0995 4B DEC BX
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% }1 y% ]1 Q' z: Z% GInstruction for CPU step 905 I L5 S! m$ s
F000:0996 0F30 WRMSR
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Instruction for CPU step 91
$ V' {! Q; M4 k0 w1 NF000:0998 41 INC CX
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Instruction for CPU step 92
5 M9 Q4 R8 W9 \! s3 c" A- WF000:0999 0BDB OR BX,BX ' J: e' ~) L6 f$ p) Q1 d
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Instruction for CPU step 93
$ t8 d4 o: E! W$ o& U/ U5 ?F000:099B 75F8 JNE short ptr 0995
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/ u: K% u0 o: Q& }4 c0 m5 ]Instruction for CPU step 94
) k# Y7 o8 }5 O; eF000:0995 4B DEC BX ( C. q5 `: x. d
" k9 ]5 C5 _9 N( F. yInstruction for CPU step 957 U8 p. a* C% _0 w4 }9 X) U
F000:0996 0F30 WRMSR
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Instruction for CPU step 96
4 _ ~' P5 F6 \+ k/ A. vF000:0998 41 INC CX . m4 V. v- |5 {$ \4 |( D' a
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Instruction for CPU step 97
. U* f( r: U z. Z8 ]: w9 gF000:0999 0BDB OR BX,BX
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$ z# L) r5 o' t4 K& S; l! aInstruction for CPU step 98
( a, m) W+ Z3 O/ R% G& YF000:099B 75F8 JNE short ptr 0995
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Instruction for CPU step 99
+ {8 F$ Q& h+ @F000:0995 4B DEC BX ! R+ p9 _: p' T/ |: O( U
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Instruction for CPU step 100
. q# ^# X" T$ j- [" ]6 L2 E; NF000:0996 0F30 WRMSR ( G$ f; N. |9 T
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Instruction for CPU step 101
0 O7 c1 e' |* b6 fF000:0998 41 INC CX 0 Q$ Z8 K: l X/ U! A
2 P% q& P1 b6 N4 {. {( cInstruction for CPU step 1029 o" }3 ~5 [. U# U6 D: L
F000:0999 0BDB OR BX,BX 9 B! P5 p" J! O: r( t5 y6 X
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Instruction for CPU step 103
+ r& i+ B- |+ r0 N4 p! UF000:099B 75F8 JNE short ptr 0995. a9 |* D2 b8 F1 t/ k1 l
- J4 c& z1 U$ @Instruction for CPU step 104
: I0 r( z; ]# w: l- {* p8 SF000:0995 4B DEC BX |
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