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CPU Reset 后的前100多条指令
- z8 \& r& |8 Y& K+ {测试平台: Intel Menlow Crown Bench CRB7 ~4 q N) [& r8 n* p2 }2 A
BIOS: 自带的 AMI BIOS/ Z' W2 F3 \1 J3 v- h
8 i( u- l% ?$ {' `" K; ^" rBelow is the instruction and registers when CPU reset
# B, {. O& }' ?- X6 BF000:0000FFF0 EAAAFF00F0 JMP far16 ptr f000:0000ffaa% T1 e6 q3 v' @! X c
EAX = 00000000: AX=0000 AH=00 AL=00 - q6 s7 M+ [3 s- {" i
EBX = 00000000: BX=0000 BH=00 BL=00
$ @& J, R v: E7 T9 x. R; SECX = 00000000: CX=0000 CH=00 CL=00 1 f, f4 @4 H9 j
EDX = 000106C0: DX=06C0 DH=06 DL=C0 + M; U" |- c, z
EBP = 00000000: BP=0000 7 J' n% a) H. ]. M) m
ESI = 00000000: SI=0000
7 N3 q9 F6 M; |$ D9 o8 a( _6 R0 rEDI = 00000000: DI=0000
4 L" v+ h8 j. d5 OESP = 00000000: SP=0000 & i8 N6 C7 e0 C8 g3 L2 f
CS = F000
1 g, l- _/ _/ k1 [- ]DS = 0000
9 B. V4 P O; K. ^SS = 0000+ C6 ~: v) [6 g3 j
ES = 0000
, z4 ^2 q8 r( u3 q6 q8 q( |FS = 0000
& T, u% j/ V/ v* j' _, SGS = 0000( Y7 g4 b T0 t/ y2 Q
EIP = 0000FFF0: IP=FFF0 & W8 D1 O [# n8 R' F
EFLAGS = 00000002: FLAGS=0002 ID=0 VIP=0 VIF=0 AC=0 VM=0 RF=0 NT=0 IOPL=0 OF=0 DF=0 INF=0 TF=0 SF=0 ZF=0 AF=0 PF=0 CF=0
0 ] n9 ~. w( {1 I G6 oCR0 = 60000010: PG=0 CD=1 NW=1 AM=0 WP=0 NE=0 ET=1 TS=0 EM=0 MP=0 PE=0 * [: s; n+ O" {9 {
CR2 = 00000000
, O/ [) j2 ?* d7 uCR3 = 00000000: PCD=0 PWT=0 ' U+ X* Q+ r) ~6 ?' R
CR4 = 00000000: VMXE=0 OSXMMEXCPT=0 OSFXSR=0 PCE=0 PGE=0 MCE=0 PSE=0 PAE=0 DE=0 TSD=0 PVI=0 VME=0 9 ^6 O" S, e, m4 [. i
0 R; E( [. O$ r" `) `Instruction for CPU step 00# z( P O1 z0 S/ a7 q7 i
F000:FFAA E9C300 JMP near16 ptr 0070
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1 F* S' x' |. ~* T: @Instruction for CPU step 01) L# j! J+ ^% ~2 n1 M2 ~4 v$ \$ r
F000:0070 E9FD01 JMP near16 ptr 0270
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Instruction for CPU step 02
: e( D v6 s" ]F000:0270 FA CLI + A5 V4 q, j9 B; g9 w7 d. d# P% G
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Instruction for CPU step 03
% U# q6 N! x. @6 Q+ {' }F000:0271 FC CLD 5 l0 p: I: B$ k7 [- k
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Instruction for CPU step 041 S2 O2 y% k& R+ P
F000:0272 668BE0 MOV ESP,EAX
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Instruction for CPU step 05$ |4 t, @* {9 [- b1 Y: D6 U
F000:0275 8CC8 MOV AX,CS * y# q2 U+ j2 e) d! B, \
# \& d/ }* B( I3 f& U8 N, EInstruction for CPU step 062 \4 ?. n$ H& I8 M8 {/ G9 u
F000:0277 8ED0 MOV SS,AX
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0 Q% G( [# C* k2 {1 {7 F9 gInstruction for CPU step 07- ]# W+ b2 Z( \. i) R5 V
F000:027C E957FE JMP near16 ptr 00d68 o* l5 G& M# ^$ J$ R! l$ I0 O
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Instruction for CPU step 085 z$ k& ?7 _. M% M
F000:00D6 E9A601 JMP near16 ptr 027f& V) A1 c" U. L+ ^# [
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Instruction for CPU step 09
( u) J, S% D6 a7 E0 I V7 n; SF000:027F B0D0 MOV AL,d0 9 J- I: k% X( ?
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Instruction for CPU step 104 o% Y" ~$ `9 s6 y
F000:0281 E680 OUT 80,AL % {/ J8 k0 U6 o
5 t' q3 @; C4 x/ n, ]) TInstruction for CPU step 11
* f2 f5 w9 \; Q# A+ W* I) sF000:0283 BF8902 MOV DI,0289
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Instruction for CPU step 121 a9 P6 R& j" r+ k3 H% u& J5 J7 |& c
F000:0286 E9AE06 JMP near16 ptr 09376 S! e9 g" Q% ^4 {
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Instruction for CPU step 13
* ~, ]2 D& n: x2 W; |# sF000:0937 0F08 INVD
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Instruction for CPU step 14! B; F: w) N- K; g G; i
F000:0939 0F6EFF MOVD MM7,EDI
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Instruction for CPU step 15
" r9 \: [9 m5 s* @F000:093C 668BC4 MOV EAX,ESP 4 k2 S, i+ G( p; g4 j
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Instruction for CPU step 163 a6 R1 S- O* i4 p" w& P
F000:093F E97C08 JMP near16 ptr 11be
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Instruction for CPU step 17& {! F( y+ Q& e' }* c
F000:11BE E981F7 JMP near16 ptr 0942) Q3 D6 @# ~& ^$ S
8 x% ^8 J% U5 N4 t! e2 {Instruction for CPU step 18; S' p# \5 Y v3 M. t/ \0 A
F000:0942 BF4809 MOV DI,0948 ) i) H( T; x- f8 s+ B( \: x1 X
$ g# h) H ?/ v; M4 j" o2 yInstruction for CPU step 194 o' u, C& Z0 m' ?+ Y T Y) @
F000:0945 E9C004 JMP near16 ptr 0e088 ^% O6 z9 m4 }
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Instruction for CPU step 20& e9 h7 K7 ^" r- \& l
F000:0E08 0F20C0 MOV EAX,CR0 ) U" a7 _) C S! I
9 E$ V3 B1 N8 i! s' O) GInstruction for CPU step 21
# b2 ~7 K# S) \, m. F& o3 ?' AF000:0E0B 660D00000060 OR EAX,60000000" {0 k+ P ?0 R4 C$ ^$ _1 o8 l
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Instruction for CPU step 22, \* ~7 g4 |% L2 L( v7 F$ M8 e- b
F000:0E11 0F22C0 MOV CR0,EAX $ B# K+ ~6 g# P4 f
; m; ]4 _7 s8 e# b1 ~5 SInstruction for CPU step 23
# {* D6 J/ |. `- V) e, fF000:0E14 0F09 WBINVD 0 N1 [- G- @( Y
+ T4 O$ V* f& O. CInstruction for CPU step 24
$ i" D: R8 K1 s% A& O" E4 ^F000:0E16 66B9FF020000 MOV ECX,000002ff
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7 L+ T: Y! `8 HInstruction for CPU step 258 p4 u7 _8 d/ E1 |
F000:0E1C 0F32 RDMSR ) A9 w4 i6 u4 G' U0 c
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Instruction for CPU step 26: s8 @" ^ c0 n' M) E& A
F000:0E1E 25FFF3 AND AX,f3ff
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Instruction for CPU step 271 s5 b2 X/ Q4 r" e1 [1 v" p; v
F000:0E21 0F30 WRMSR / d+ \$ j1 V7 \& M0 `% y/ W
1 T( D5 X4 R8 [9 \5 x) uInstruction for CPU step 28
, x: g! O7 K4 f" K* ~. @+ GF000:0E23 0F09 WBINVD . j) ~3 p6 e+ P$ y
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Instruction for CPU step 29
' x8 [9 Z+ f0 o3 z2 [5 eF000:0E25 0F20E0 MOV EAX,CR4 R$ J x: h' S5 Y0 q+ m' w, x/ J
4 x, K0 t3 Y+ t$ @' c. T& x% \" ~Instruction for CPU step 30# M1 w- _6 z& `2 S! k/ y% B
F000:0E28 247F AND AL,7f
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* F1 z9 |6 V2 O: {/ EInstruction for CPU step 31
$ _) g/ z0 ^1 p8 r7 I' r! oF000:0E2A 0F22E0 MOV CR4,EAX $ a" j* I+ @$ ^; ~" ?( `
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Instruction for CPU step 32
( {( x* Q7 _0 f) n" sF000:0E2D 0F20D8 MOV EAX,CR3
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- i6 n [9 _; }" p- T( gInstruction for CPU step 33; I2 _& M) c& X9 Q2 m
F000:0E30 0F22D8 MOV CR3,EAX
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" v: F7 B5 x0 fInstruction for CPU step 34
+ e- }1 I: x9 U6 w- XF000:0E33 FFE7 JMP DI 4 m9 u6 G4 I2 g# J, g$ }
P% D! d# E* U0 k4 uInstruction for CPU step 35- t4 X" Z7 `' o5 D
F000:0948 66B9FE000000 MOV ECX,000000fe" F" k- @, n9 `. V; L. i5 n
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Instruction for CPU step 36; x- Y& ?+ u B5 Q/ ^
F000:094E 0F32 RDMSR
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Instruction for CPU step 37% _, E! M/ y0 K
F000:0950 0FB6D8 MOVZX BX,AL
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Instruction for CPU step 38/ \5 |8 j( G/ V' J/ S$ s6 q
F000:0953 6633C0 XOR EAX,EAX # J" c; o# S% o$ C
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Instruction for CPU step 39
* z# J" [4 D! s3 m* zF000:0956 668BD0 MOV EDX,EAX 0 H# Z: S/ e6 h7 i8 }) ~
0 z( p" o* R( hInstruction for CPU step 40: h4 n; j( m7 k- u! T5 _1 H
F000:0959 B95002 MOV CX,0250 " y: g0 z9 U( O) W8 x8 J4 e/ J
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Instruction for CPU step 41
8 i* c8 m5 @# D+ ]F000:095C 0F30 WRMSR 0 c6 m! y/ Y6 }" I& V
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Instruction for CPU step 42- e* |* n$ W. K% h+ r3 h2 h$ Y" h
F000:095E B95802 MOV CX,0258
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9 Z( w! D- F: D% ?8 m. B6 ]& L M: IInstruction for CPU step 43& T+ H" c9 n2 c' b7 \4 L
F000:0961 0F30 WRMSR 3 ^" r1 c" y+ O6 l7 T2 c/ C" u
( V+ y3 U' F% n3 H" l# R6 tInstruction for CPU step 44
$ ^, m+ h& B* p+ z, N3 A' m& g/ p$ {F000:0963 B95902 MOV CX,0259 1 T$ f) b- y* M; `) h
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Instruction for CPU step 45
/ i: ?, ]) S" nF000:0966 0F30 WRMSR
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h. A4 g9 g# B: SInstruction for CPU step 46- C% E: L- G8 e1 L+ P
F000:0968 B96802 MOV CX,0268 7 n. B/ T3 z2 d4 u2 j
; H$ P7 q# q: X- d9 d8 qInstruction for CPU step 47
4 `, U' f2 Z& {! T- oF000:096B 0F30 WRMSR . H* U5 ?! E" L( B
8 z: J! U) x( y5 \Instruction for CPU step 48
7 N1 s" v( g# s% ?: nF000:096D B96902 MOV CX,0269
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# n' I Q6 i2 {/ o% WInstruction for CPU step 49' v k* |4 e1 P0 G) V
F000:0970 0F30 WRMSR & ^7 n& }9 Q: ?, u' g6 E! y
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Instruction for CPU step 50
5 k, i" l2 p& j, AF000:0972 B96A02 MOV CX,026a
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Instruction for CPU step 512 Q+ A H8 Z$ Z) C! T
F000:0975 0F30 WRMSR 1 q" T- v1 ?7 a$ Y" H! r2 { c
9 ]) t* Q; O1 K" _Instruction for CPU step 52
: J" E! e" a+ G0 ~+ tF000:0977 B96B02 MOV CX,026b
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Instruction for CPU step 53
5 ]: w, U) k& d/ P% h+ Z4 mF000:097A 0F30 WRMSR
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Instruction for CPU step 54
9 [' ?: \- @6 n9 T, NF000:097C B96C02 MOV CX,026c * G, C+ X3 o2 I; P1 ]( f
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Instruction for CPU step 55
7 Q$ q5 o* s! D6 w% @5 G/ AF000:097F 0F30 WRMSR 4 ~4 J' v4 Q1 ?. R; L) B
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Instruction for CPU step 56
, p1 I0 H& S0 e+ @# l6 CF000:0981 B96D02 MOV CX,026d % V# v% r3 l% Q; R' l
4 Y# i0 ]. p8 O& ?Instruction for CPU step 578 b1 _3 {& T' u5 G% l* C W) f
F000:0984 0F30 WRMSR 0 n) ]& Y% _4 a T3 b& z
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Instruction for CPU step 58
4 @( w4 w5 b! q1 J( iF000:0986 B96E02 MOV CX,026e
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3 j! ?1 u7 [- T6 e8 BInstruction for CPU step 592 A! M! B5 F+ J. }
F000:0989 0F30 WRMSR
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Instruction for CPU step 60- C( O T" v+ { {: d4 v* w+ |
F000:098B B96F02 MOV CX,026f
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Instruction for CPU step 613 O& O! C! d( A
F000:098E 0F30 WRMSR 1 l6 E9 `. S8 K" n7 `! S
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Instruction for CPU step 62. M* t9 |+ `; T1 N; U
F000:0990 D1E3 SAL BX,1 2 e, B9 W0 }) v8 T
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Instruction for CPU step 63 o, U! {% ~. K. E
F000:0992 B90002 MOV CX,0200
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p. S, _ h( h% z, QInstruction for CPU step 644 V3 F# _& d3 Y# x: S" u
F000:0995 4B DEC BX 3 A4 a$ U. E- q" N
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Instruction for CPU step 650 W0 \7 F8 f9 Z
F000:0996 0F30 WRMSR
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Instruction for CPU step 66
; N# ] M- v _% f( `" I! j2 ZF000:0998 41 INC CX 0 u( O. F+ H2 T7 \( O# J: J& j
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Instruction for CPU step 677 s9 \0 ?* K0 i
F000:0999 0BDB OR BX,BX , s5 b% U4 L6 Z" f
" e5 d a8 \! R& x# w& J5 vInstruction for CPU step 687 ^& d: W8 w1 @$ b7 a u
F000:099B 75F8 JNE short ptr 0995& ~4 G& U0 ?. x- {3 m
: _1 n! N" f) O6 T' J2 F- z: YInstruction for CPU step 69( _: ^& G& p& ^ C
F000:0995 4B DEC BX & K8 |. g+ o* d/ V
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Instruction for CPU step 70! M2 @( Q2 w; J6 F7 `6 P0 T9 K. K$ \
F000:0996 0F30 WRMSR
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Instruction for CPU step 71
, E* F4 W2 s" JF000:0998 41 INC CX / c2 Z' v- A" v1 ^8 K5 S6 k& _
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Instruction for CPU step 72
& w7 e7 D( t4 g3 E M8 }F000:0999 0BDB OR BX,BX
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: E4 p, v. n- T5 J8 M" Q: w6 b5 n9 DInstruction for CPU step 73
) K# h, Z1 s# b6 ]F000:099B 75F8 JNE short ptr 0995
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9 y' V" ~. ]$ XInstruction for CPU step 74
) G$ X7 v7 ~" C6 q* c- \8 ^% BF000:0995 4B DEC BX
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Instruction for CPU step 75
' b; j8 h7 Y7 T; k8 T, KF000:0996 0F30 WRMSR
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! F2 H2 @) v6 j m6 o3 Q! TInstruction for CPU step 76. X( n4 ` z# r- E* z. _. _
F000:0998 41 INC CX
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& t3 z& M" P/ X0 K- `Instruction for CPU step 77
3 a2 j& z/ {( M& o+ ZF000:0999 0BDB OR BX,BX
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: A( S+ n7 g: d4 o! mInstruction for CPU step 78
$ W& _+ E: z/ `' S+ KF000:099B 75F8 JNE short ptr 0995
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: _! x/ p+ v& A6 t6 I$ ^6 kInstruction for CPU step 79
1 h T+ L! w1 x) o* {" u8 tF000:0995 4B DEC BX - D3 E; P) d7 E8 R2 e6 H, N
2 \" C( ~$ |! ?( {6 BInstruction for CPU step 80) I8 {0 Q# T k& ^! L. r( R
F000:0996 0F30 WRMSR g4 B! u7 |8 w- ^! i
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Instruction for CPU step 81
( n9 {" Q7 n; g# f+ b# zF000:0998 41 INC CX
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3 S! W( R& d( y0 M6 p ]6 VInstruction for CPU step 82
% `) a, P7 `- x' y7 r; fF000:0999 0BDB OR BX,BX * K y: `6 F+ R# `9 W! l+ P* ]
5 ^! x' A8 ~ O b2 v" d- l1 LInstruction for CPU step 83
6 O( [7 Q( T7 j; m9 S4 G @F000:099B 75F8 JNE short ptr 0995. u' t* Y" D# h( W$ x
8 D* ^- o9 Z% b' PInstruction for CPU step 84' b& T& ~1 f" p
F000:0995 4B DEC BX $ I0 G. w; m/ R# f t! N
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Instruction for CPU step 85" {0 d T& N$ O5 d: O
F000:0996 0F30 WRMSR
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Instruction for CPU step 866 Q$ {; B) r; i: i- m Q/ @7 Q
F000:0998 41 INC CX ) H4 m( P- r3 q) n0 S
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Instruction for CPU step 87
6 K7 f$ h! r% `- y2 y9 {* xF000:0999 0BDB OR BX,BX
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Instruction for CPU step 88
0 b+ D5 X, ^9 L5 [) \) K2 HF000:099B 75F8 JNE short ptr 0995" f: ]% n M. `, |
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Instruction for CPU step 89
0 H/ Y9 F- b) mF000:0995 4B DEC BX
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Instruction for CPU step 906 W8 M2 p9 z$ h. J' |$ i, n
F000:0996 0F30 WRMSR
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! ?' Q% @' G6 z) u5 i! yInstruction for CPU step 91
1 ^2 `. Z4 ^0 S7 dF000:0998 41 INC CX + l$ }4 p! S+ c Z% {6 Z% R% F: W6 `8 z
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Instruction for CPU step 92
& B, \5 g4 F# x1 `F000:0999 0BDB OR BX,BX 1 J- w# d1 ]0 E4 x2 _
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Instruction for CPU step 93
/ o1 t) X/ E; @7 Y# nF000:099B 75F8 JNE short ptr 0995/ v8 y* t& Q7 R6 m% k0 x
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Instruction for CPU step 94) {' ?4 L, A. S& o+ ]
F000:0995 4B DEC BX
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- Q: x z8 W; R$ j, l6 L' cInstruction for CPU step 95% I2 n% A {1 j: q
F000:0996 0F30 WRMSR
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Instruction for CPU step 96$ Z' u& A6 K6 ]/ }9 J$ F
F000:0998 41 INC CX
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Instruction for CPU step 97
4 |; D( m1 N. l9 B) E n+ ?F000:0999 0BDB OR BX,BX
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Instruction for CPU step 981 ^7 i# U1 w7 m; Y' p* w
F000:099B 75F8 JNE short ptr 0995# }5 v1 D/ T5 N/ m! x- }
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Instruction for CPU step 99: ^# t+ v! ]( ?5 ]" q! r* F
F000:0995 4B DEC BX % J# i F! g5 V* p* [- E& v. _' @- {
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Instruction for CPU step 100
0 X# N2 ^) u7 C+ ^2 H+ {F000:0996 0F30 WRMSR 7 F% D8 k2 d3 d+ ~3 B5 G4 A
+ Y# g; f Q$ Z2 f9 B; kInstruction for CPU step 101
1 J* \. }& S- b" N9 o0 v( m- r* KF000:0998 41 INC CX & S9 ], P5 Y% \& i: @ x5 I
8 V. z3 ?+ o) w2 P" TInstruction for CPU step 102
: ]9 q3 `: r; v% dF000:0999 0BDB OR BX,BX ! {% S8 f" ?/ d: I- R# I3 @
5 b- V! g* C% B+ x% `- {0 H, EInstruction for CPU step 103. [+ |/ @$ g" E* P- C5 c- W; q
F000:099B 75F8 JNE short ptr 0995
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Instruction for CPU step 1045 K& v* i0 |$ P( F9 d4 t
F000:0995 4B DEC BX |
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