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CPU Reset 后的前100多条指令
7 \8 b7 C( p- e3 E2 B: |9 g测试平台: Intel Menlow Crown Bench CRB
5 s) m. d: z8 `) aBIOS: 自带的 AMI BIOS
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& u, {' s. `' J, I0 g! S7 A. F9 ]/ I1 ?Below is the instruction and registers when CPU reset
" ^- c" W* E! Z, o: G, T( MF000:0000FFF0 EAAAFF00F0 JMP far16 ptr f000:0000ffaa$ J9 n( T5 F, Z8 T M" w7 n! s! ~/ ?
EAX = 00000000: AX=0000 AH=00 AL=00 - _- }! L" J/ d2 \4 o
EBX = 00000000: BX=0000 BH=00 BL=00
7 P" l9 {4 ]! c3 F# ~ECX = 00000000: CX=0000 CH=00 CL=00
& ]' ~9 ~9 |9 X. j3 O* b, L, c8 lEDX = 000106C0: DX=06C0 DH=06 DL=C0
% `6 R5 M% E. k* eEBP = 00000000: BP=0000
1 v! ]3 \/ C% w h: jESI = 00000000: SI=0000
0 H! z: l4 m# Q% Y& o5 F zEDI = 00000000: DI=0000 ; u6 u5 V0 K, h8 S
ESP = 00000000: SP=0000
- A; e* b8 o+ i- A! qCS = F000
# q; c, n( j. y- \ c3 j+ RDS = 0000
1 F, e9 j* K# G: fSS = 0000, `4 n; p8 x: l! S+ k2 y, G( a
ES = 0000
" J2 ?+ _2 y1 S6 b4 E ` lFS = 00006 c; v! R+ |0 T- S
GS = 00006 O( K# t _$ s( W! v
EIP = 0000FFF0: IP=FFF0
& W0 ~! t* v9 V- \EFLAGS = 00000002: FLAGS=0002 ID=0 VIP=0 VIF=0 AC=0 VM=0 RF=0 NT=0 IOPL=0 OF=0 DF=0 INF=0 TF=0 SF=0 ZF=0 AF=0 PF=0 CF=0
5 [- z j$ _9 vCR0 = 60000010: PG=0 CD=1 NW=1 AM=0 WP=0 NE=0 ET=1 TS=0 EM=0 MP=0 PE=0
8 q8 ~" q! o- c4 Z! QCR2 = 00000000
' q! M: c. X: z3 oCR3 = 00000000: PCD=0 PWT=0
}2 v1 b G/ F7 _% k, a, z! uCR4 = 00000000: VMXE=0 OSXMMEXCPT=0 OSFXSR=0 PCE=0 PGE=0 MCE=0 PSE=0 PAE=0 DE=0 TSD=0 PVI=0 VME=0 2 ^7 T& Y8 z, s" F- d+ M% l: h5 T+ B' J
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Instruction for CPU step 00
! y: B8 e+ A" k, v/ _% gF000:FFAA E9C300 JMP near16 ptr 0070, Z* h: |; H0 f9 `
f5 h! R7 N* \, Q0 O# p5 A dInstruction for CPU step 01
+ ~! c6 M& ?/ u/ }F000:0070 E9FD01 JMP near16 ptr 0270' i6 k% d9 W8 B5 i
& V5 d) t) j7 b" |; tInstruction for CPU step 02
) b3 s P9 ~2 _6 a) cF000:0270 FA CLI ) l, W7 d2 c! H3 S3 G: N, W
& U* J2 i9 E" ^$ Q$ SInstruction for CPU step 03+ a3 _4 Y+ w# e& i: _7 h
F000:0271 FC CLD 1 |: d K G$ Z: p( z' M
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Instruction for CPU step 04
/ ]+ A, u+ S" ?F000:0272 668BE0 MOV ESP,EAX 5 o. W. g: L4 }
8 {$ r* a; u# f7 ?! n7 Q6 VInstruction for CPU step 05* @* c8 B& m1 e1 N# P. w
F000:0275 8CC8 MOV AX,CS
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, f2 t0 z" W: f1 z5 R" S; JInstruction for CPU step 06
- Z( c, f( c& f* D2 \1 `2 sF000:0277 8ED0 MOV SS,AX % O' k) N6 ?0 @ K' I; g
, t0 F- c, u% u9 o1 o; e4 `. xInstruction for CPU step 07
& y; ]; C+ z+ a# C' x6 ~- r3 ~+ vF000:027C E957FE JMP near16 ptr 00d6
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Instruction for CPU step 08! a1 l1 r; U& w* J% d
F000:00D6 E9A601 JMP near16 ptr 027f/ V6 Q- l- ]5 b* G3 Y" O3 Q7 g4 Q; z
, y# F* s" m/ L# uInstruction for CPU step 09
4 a0 d$ R5 y0 b- N* wF000:027F B0D0 MOV AL,d0 , e: b0 Z9 _ m9 R! i7 }
2 t4 W; B5 P' |0 ~7 ~' o% HInstruction for CPU step 10# }( z8 d, U9 A) W5 m8 A) u. e3 _
F000:0281 E680 OUT 80,AL , ?7 u/ ], u1 i# _. `9 r& f
+ ]$ a( @" g) `1 Q5 ~
Instruction for CPU step 11" v( s" F3 b5 U& `1 Y3 G! ~
F000:0283 BF8902 MOV DI,0289
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' K0 q$ u0 J' M& vInstruction for CPU step 12) A7 a$ h( {9 I; `! Y ]/ ?1 w/ a8 y' }
F000:0286 E9AE06 JMP near16 ptr 0937) f! u+ @+ _( O- w
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Instruction for CPU step 13
9 H5 @) e$ ^% ?) T5 J6 t$ C4 y# XF000:0937 0F08 INVD
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Instruction for CPU step 14
& J$ S0 x8 T G G$ W1 vF000:0939 0F6EFF MOVD MM7,EDI / ?3 X8 a7 x" y7 d
+ }0 K# [: r! S, oInstruction for CPU step 156 A0 i( T3 D# ~# [
F000:093C 668BC4 MOV EAX,ESP
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Instruction for CPU step 168 ~6 c2 H( z/ r4 K% }9 z1 N
F000:093F E97C08 JMP near16 ptr 11be) e9 q$ r% ?5 ^& L! I p k9 O
0 U* v' Z, D# z9 h1 HInstruction for CPU step 17
7 ^. o. \: o) U6 w9 oF000:11BE E981F7 JMP near16 ptr 0942. U& z1 N" }8 x7 @$ U2 i% J% r
$ ^& A* R. e) o5 y, rInstruction for CPU step 18) t6 h. L: g0 O+ `
F000:0942 BF4809 MOV DI,0948
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; X0 }5 F9 R" D! p+ R" T6 t- B; kInstruction for CPU step 198 {8 B" K- h* e/ a" I. x
F000:0945 E9C004 JMP near16 ptr 0e08
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Instruction for CPU step 20
( ? |. B p9 T9 b9 F+ u6 {8 _F000:0E08 0F20C0 MOV EAX,CR0
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Instruction for CPU step 21" E: t& P7 m+ r- N& a D+ X: M+ o
F000:0E0B 660D00000060 OR EAX,60000000: u$ v6 x9 _7 G1 D5 \
7 v+ m, |8 I. [1 mInstruction for CPU step 22" l% H7 q9 V0 b; \
F000:0E11 0F22C0 MOV CR0,EAX ' a: \/ d8 s7 ~9 \: P
$ Q/ {* P- s( Z( KInstruction for CPU step 23
+ Z/ o; {! u9 C; @( w% EF000:0E14 0F09 WBINVD / |; N: Y a6 m4 ]+ j. `/ o
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Instruction for CPU step 246 l: I. r1 k5 ~# f! i0 L$ ~, g
F000:0E16 66B9FF020000 MOV ECX,000002ff8 c N8 i: b4 v5 {
0 E" |8 \) O8 z1 f; _4 { ~! e' |; {Instruction for CPU step 25
' L$ E8 S4 r YF000:0E1C 0F32 RDMSR & z+ s3 f4 o& O& T& U
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Instruction for CPU step 26
Z3 H% H# j: I3 Y# `1 QF000:0E1E 25FFF3 AND AX,f3ff 0 x9 X: v* l2 ^$ Q n
, t/ L$ H3 @% y' O5 x+ V3 lInstruction for CPU step 27
) j( S5 V$ G1 X5 }8 |! }! FF000:0E21 0F30 WRMSR
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7 P6 D8 Q. d O4 }9 s. N# {$ tInstruction for CPU step 285 L+ ]1 Q' \; U" C1 c% [8 g# D
F000:0E23 0F09 WBINVD 8 d1 D5 i0 w, H" N3 F
) v9 B- a1 O0 v! C- FInstruction for CPU step 29* B3 X/ C1 }' h& p; G- ~& ?, d5 }, m
F000:0E25 0F20E0 MOV EAX,CR4 7 F- ?! T3 w7 u: ~' w n# M3 m
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Instruction for CPU step 308 K E2 Q3 s$ N' p; }7 w3 |
F000:0E28 247F AND AL,7f 3 y& ~1 ]( C% Z
% |5 B0 w) {2 C# s! ~Instruction for CPU step 31
3 [7 h# }6 o: @F000:0E2A 0F22E0 MOV CR4,EAX
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Instruction for CPU step 32
% T3 e0 [( A+ v% [F000:0E2D 0F20D8 MOV EAX,CR3
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6 i1 L( m$ ]7 X2 MInstruction for CPU step 331 {7 ~' Y' i$ k; b1 \; W& j
F000:0E30 0F22D8 MOV CR3,EAX % A f; y9 q7 x8 m8 i
2 H" h: ~2 y/ P
Instruction for CPU step 34
6 g1 h6 D$ H1 g0 G! {8 IF000:0E33 FFE7 JMP DI $ x- I/ l- O* _+ h
& R7 l* V& s* X: j, t# SInstruction for CPU step 35, T' F8 J- E# i2 D+ S( r
F000:0948 66B9FE000000 MOV ECX,000000fe7 X' p5 [' z& H: ]6 x( b& g
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Instruction for CPU step 36
2 R" Y, z" F- w# ~6 N, @F000:094E 0F32 RDMSR
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3 k1 v y0 {" R0 F3 UInstruction for CPU step 374 h1 `$ p( K0 S+ r% q
F000:0950 0FB6D8 MOVZX BX,AL " ^. H {) y7 `+ J, q
+ A/ e6 u- h& O; I5 z/ a
Instruction for CPU step 38
$ R9 g+ Q. s0 d7 E, }+ aF000:0953 6633C0 XOR EAX,EAX ' R3 Z% v( D( ?1 A S& J( R
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Instruction for CPU step 39
( b8 K7 m0 e9 ~' H; O; WF000:0956 668BD0 MOV EDX,EAX
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/ l% T0 ^- n6 r5 e! c. w' Q* TInstruction for CPU step 406 r5 J. w0 T8 u/ w
F000:0959 B95002 MOV CX,0250 5 A3 A2 `0 s8 n8 N* n# t
" J9 i8 Q$ C/ {7 cInstruction for CPU step 410 J2 i4 C$ W ?2 _/ N$ O- O! \$ e4 l
F000:095C 0F30 WRMSR
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. N7 y3 [: B. d) r- c& bInstruction for CPU step 424 t$ ~5 @6 D5 I
F000:095E B95802 MOV CX,0258 " v( x v9 o( ^' Q6 a: C
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Instruction for CPU step 437 h) Q2 t4 c8 Z1 Y6 t$ m m
F000:0961 0F30 WRMSR
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Instruction for CPU step 44
) a$ z. ^6 H1 z2 ^/ Z! T3 hF000:0963 B95902 MOV CX,0259 : ^# R+ R) U0 E& S: a
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Instruction for CPU step 45
( N1 _# X& T. ?2 O) fF000:0966 0F30 WRMSR
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( ]2 c0 J* k2 Y+ u3 v9 U) tInstruction for CPU step 462 O4 e/ ^ T( Q# B& Z6 Q
F000:0968 B96802 MOV CX,0268
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Instruction for CPU step 47
% ]# V* L4 s9 v5 JF000:096B 0F30 WRMSR 4 G# p. ~2 |1 G4 P5 g" E
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Instruction for CPU step 48
4 t/ L; \: |2 PF000:096D B96902 MOV CX,0269
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" _, ~; U! D9 M4 T/ H4 N! t. WInstruction for CPU step 49
! f0 W$ K/ y, R0 zF000:0970 0F30 WRMSR + {5 [ o6 |) E% l% J! b1 \
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Instruction for CPU step 50% j6 M* C3 r3 \* s7 e$ c4 E$ D
F000:0972 B96A02 MOV CX,026a
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Instruction for CPU step 517 X( G- b( L% _- T0 d$ X
F000:0975 0F30 WRMSR 8 p6 E3 X- d, {) T% E
( S: u5 x; |3 K9 rInstruction for CPU step 52
9 ?: h) a/ \2 y1 E4 @( @9 YF000:0977 B96B02 MOV CX,026b ' O& L9 X T# V8 x2 d
! z9 h* L6 t) sInstruction for CPU step 53
. H+ }- \2 ~! `8 z: p* YF000:097A 0F30 WRMSR
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Instruction for CPU step 54
/ ^* c, x S4 C% q# rF000:097C B96C02 MOV CX,026c 4 f: L& r4 e0 E! H ^2 S1 t) |- v
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Instruction for CPU step 55& n$ C* Y& O6 E' b0 o. u
F000:097F 0F30 WRMSR
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4 F/ T& y4 ~* E& cInstruction for CPU step 567 F* w. T7 }4 D2 |
F000:0981 B96D02 MOV CX,026d - C8 X! ]+ z8 D" j+ y5 q
$ j8 s9 Q4 i! u |) z" UInstruction for CPU step 57! V, e5 q- _4 c& _) b& m% `
F000:0984 0F30 WRMSR 8 P8 n5 K+ x* O; g( [2 S
6 H7 O% u" Z9 @9 {& rInstruction for CPU step 58
% o; u6 n8 w R* t$ X3 ~F000:0986 B96E02 MOV CX,026e ; ~% [* z; \- T
6 H4 t. u) ^2 p. {2 I- NInstruction for CPU step 59# I$ I4 X/ j" k0 e9 K# ]1 G
F000:0989 0F30 WRMSR
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Instruction for CPU step 60
5 D( ?3 Z6 ?4 K W; k n# L/ jF000:098B B96F02 MOV CX,026f
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' B1 q7 H* Y6 d' ]" p% f$ ~Instruction for CPU step 61
Z3 W9 m) ^4 f4 \2 \8 KF000:098E 0F30 WRMSR ' @4 p/ q. y# T& y
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Instruction for CPU step 62
" y V7 ?( D+ Q) o* O2 t! DF000:0990 D1E3 SAL BX,1 " K* w4 i9 A/ v. H6 h
0 C2 J& @/ q1 uInstruction for CPU step 63- Y; Z) i' I n3 Z8 n
F000:0992 B90002 MOV CX,0200 ! Z& s5 f. W A6 d9 h$ \7 F
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Instruction for CPU step 64
3 I8 \+ C' a7 A9 x, g/ \F000:0995 4B DEC BX - e5 R6 v! e; u
; F+ x [4 L7 U: f. R$ R$ _Instruction for CPU step 657 L' z! [( g" y9 m j6 }
F000:0996 0F30 WRMSR ! S. [% Q# n, M4 I; e! l
$ O: w( L( I9 i, `% wInstruction for CPU step 66
- }5 L7 { M1 ?3 u- E- z0 K H" pF000:0998 41 INC CX
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Instruction for CPU step 67" q% v4 ]/ I f3 a9 `% P: n
F000:0999 0BDB OR BX,BX + ^: _, h2 X0 ?# V1 u% R
5 |8 Z# `9 c+ vInstruction for CPU step 68
* b: e" o1 P# s4 \F000:099B 75F8 JNE short ptr 0995
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+ J' D- j! ^3 [Instruction for CPU step 69
- x6 b6 q I% D* sF000:0995 4B DEC BX
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Instruction for CPU step 70
* m0 o' u- i( I- ]) V0 E, r! zF000:0996 0F30 WRMSR
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Instruction for CPU step 71
: d1 k: J: [% z. s, F. o$ NF000:0998 41 INC CX ! V+ E& U/ q- y/ a
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Instruction for CPU step 72 ]- L7 p$ \5 d% E
F000:0999 0BDB OR BX,BX 6 `: p. J4 R" o2 e, O# w& z' W5 y
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Instruction for CPU step 73, X( `( r" G# H8 W B; G& [
F000:099B 75F8 JNE short ptr 0995
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$ P4 i$ A/ d( a: {8 h2 q- @ kInstruction for CPU step 74
+ a4 X" T) ^- S9 d0 @( q6 bF000:0995 4B DEC BX
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Instruction for CPU step 75
9 G& b0 k. e+ _# q% ~2 zF000:0996 0F30 WRMSR
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Instruction for CPU step 769 o# k2 Y8 c: J% `1 t
F000:0998 41 INC CX
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# v- x$ c8 W4 s. `Instruction for CPU step 779 c& a) }' d& V( o& W" @, N
F000:0999 0BDB OR BX,BX : `* z; o9 P" @1 l0 a# o% G
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Instruction for CPU step 78( g& a w8 A3 O
F000:099B 75F8 JNE short ptr 09952 Z; {* M9 q ]& O
9 |9 D" }* J1 tInstruction for CPU step 79
0 J' L2 S/ a5 `- GF000:0995 4B DEC BX ; W L3 q$ O; p+ f+ h# q# [
8 c# I R y( I) S1 k6 o) B8 pInstruction for CPU step 80
6 i6 h; d# G* d, `) S: v3 f4 ^( kF000:0996 0F30 WRMSR * O# ]/ |0 _* |. {
; H* ^/ ` r5 LInstruction for CPU step 81
( P) y E- v5 V# _1 NF000:0998 41 INC CX
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! ^$ ^; J% |5 m3 W+ M% [4 k: _Instruction for CPU step 82
1 {- a' Y. Z0 q3 I7 }F000:0999 0BDB OR BX,BX * |& |7 [" _' _. L
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Instruction for CPU step 83
7 I, s0 A K, ~) O' A3 mF000:099B 75F8 JNE short ptr 09957 L. N P; T1 U% U9 Y
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Instruction for CPU step 849 ]( G: p! A+ `$ o' b
F000:0995 4B DEC BX # U4 u) A$ ~* y4 s k
" G# Z- x6 R% I! U- b/ h/ qInstruction for CPU step 858 o! Q! S6 H d7 t# ]
F000:0996 0F30 WRMSR
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Instruction for CPU step 86% l* U0 C6 a. a1 h( U2 v- P3 D7 u
F000:0998 41 INC CX
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Instruction for CPU step 87
5 o+ v+ `3 }* A6 O: p* n$ H9 U+ P* fF000:0999 0BDB OR BX,BX * ?( D9 Q8 S& Y+ W" }
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Instruction for CPU step 88
8 z! T' S7 s$ \: j8 e! AF000:099B 75F8 JNE short ptr 09952 K D( Y# g; a4 @3 Z" n; z
( Z2 ?+ Q; L$ eInstruction for CPU step 89
. l& g* i- [9 ~4 [1 J/ N; S, XF000:0995 4B DEC BX " v6 K4 j) d' c. t2 v) U' q$ o6 o
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Instruction for CPU step 90& V1 o4 J0 a* w3 O. b! ~' `# p( _8 H
F000:0996 0F30 WRMSR * ^6 D5 U! X& D
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Instruction for CPU step 91
- A. p0 v$ ^) H6 b/ e+ c9 H0 p; {F000:0998 41 INC CX
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Instruction for CPU step 92
' [; B% e6 Y2 N3 oF000:0999 0BDB OR BX,BX
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% N) v- Z: B3 Q6 p" D8 AInstruction for CPU step 93
+ w) }0 r* R2 _$ tF000:099B 75F8 JNE short ptr 0995
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1 M" a0 }# N, `! \+ ?1 pInstruction for CPU step 94
; t6 a% s5 E1 ~1 ?( _1 ^F000:0995 4B DEC BX
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3 b2 g+ y+ x) j: x0 C0 mInstruction for CPU step 95
4 T$ `# o3 t: C. G. GF000:0996 0F30 WRMSR + q* X; X- a. ?! r; S. O3 b
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Instruction for CPU step 961 f+ y" L6 |! x" Z6 W8 R
F000:0998 41 INC CX 6 o* _. A+ M( a2 Q% ^/ ^
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Instruction for CPU step 979 t9 z+ ]9 }# g+ a% L7 {0 P
F000:0999 0BDB OR BX,BX ' o2 _+ d: l3 B: }9 t m7 ^) f; s
* z/ U9 ?6 ?. J3 z5 j! gInstruction for CPU step 98- |3 E8 |; N1 _7 n6 K4 t# t
F000:099B 75F8 JNE short ptr 0995
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4 f. i- q/ A9 Q1 x9 {Instruction for CPU step 994 b! j+ ?/ [9 }+ l6 B$ \
F000:0995 4B DEC BX
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Instruction for CPU step 100
; C) T" u6 l9 k6 mF000:0996 0F30 WRMSR
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Instruction for CPU step 101
) e& |: o8 P* c$ g7 pF000:0998 41 INC CX
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4 [; c9 e5 |- Y% ?" fInstruction for CPU step 102( l+ |& J4 q, ?, d! I+ T
F000:0999 0BDB OR BX,BX 6 E& v% ]" d) c
* ]" W4 D: O; M" z g% qInstruction for CPU step 103$ g6 {7 V- q2 G8 M) @" T
F000:099B 75F8 JNE short ptr 0995+ {8 i( i4 X# X5 [7 @
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Instruction for CPU step 104$ Y) I& N# o# Z5 N# I: \
F000:0995 4B DEC BX |
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