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CPU Reset 后的前100多条指令; k. W: \7 k' |$ m t, T
测试平台： Intel Menlow Crown Bench CRB; _ j4 O) ~" ^/ O$ G
BIOS: 自带的 AMI BIOS
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Below is the instruction and registers when CPU reset
) e- I! h: t, n( QF000:0000FFF0 EAAAFF00F0 JMP far16 ptr f000:0000ffaa8 d1 K: g. o# r/ F: F- Y) x
EAX = 00000000: AX=0000 AH=00 AL=00
9 H% @2 m6 D3 x# E2 `$ L1 F k# gEBX = 00000000: BX=0000 BH=00 BL=00
8 S8 W8 ~( [1 y5 n! ]ECX = 00000000: CX=0000 CH=00 CL=00
8 G6 y, e1 J8 Z5 F) ?. I4 n5 FEDX = 000106C0: DX=06C0 DH=06 DL=C0
0 G7 m0 a$ f$ G! p" JEBP = 00000000: BP=0000
5 J" O* u8 |- \/ D; A" jESI = 00000000: SI=0000
2 t: r' S, A# A5 s/ s+ J1 JEDI = 00000000: DI=0000
c6 {) E9 n; p1 [ESP = 00000000: SP=0000 / \' g. l& r/ V, ]& l+ a# j: }
CS = F0008 [3 h* W" G1 d9 C
DS = 0000
& v: \% h5 k% r9 F5 d5 S4 jSS = 00008 j: c8 F( h2 G$ {7 L4 `5 C) J% q
ES = 0000
! J; A0 d. x; F3 q; e: W7 oFS = 0000
4 g6 h/ u! I5 UGS = 0000' s9 p2 y! [) s- y2 x7 f! Q
EIP = 0000FFF0: IP=FFF0 1 ~' W" o6 { ~: p9 S9 ^5 F7 d% B
EFLAGS = 00000002: FLAGS=0002 ID=0 VIP=0 VIF=0 AC=0 VM=0 RF=0 NT=0 IOPL=0 OF=0 DF=0 INF=0 TF=0 SF=0 ZF=0 AF=0 PF=0 CF=0 ; P1 l8 M& G$ I3 `0 d, _3 P
CR0 = 60000010: PG=0 CD=1 NW=1 AM=0 WP=0 NE=0 ET=1 TS=0 EM=0 MP=0 PE=0
/ B/ H; J8 f. Q; ~& W8 Z' s* j KCR2 = 00000000# @8 }/ H) j1 w5 O- N$ L+ |1 U
CR3 = 00000000: PCD=0 PWT=0
, l7 R' w/ F, y. R- {' y J( HCR4 = 00000000: VMXE=0 OSXMMEXCPT=0 OSFXSR=0 PCE=0 PGE=0 MCE=0 PSE=0 PAE=0 DE=0 TSD=0 PVI=0 VME=0
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' ~: I6 S: L1 o) L- f* W4 JInstruction for CPU step 00
* p" j" |. H w; B _/ lF000:FFAA E9C300 JMP near16 ptr 0070) r" T& u. a; {9 B A. A
: {& B7 t$ E2 S+ I/ e" V2 j6 f0 K1 U0 iInstruction for CPU step 016 f, L* G# ]3 u+ y% k5 m* y4 X! [
F000:0070 E9FD01 JMP near16 ptr 0270& j+ ]* f# e$ R+ C& E* t ]6 {
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Instruction for CPU step 02- }6 G$ ~3 ]7 |: S% }# O
F000:0270 FA CLI
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9 ~2 N- [4 C9 [' G; mInstruction for CPU step 036 Y# o9 N3 v" x6 R# A3 R
F000:0271 FC CLD
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7 D% G* p" P$ ~Instruction for CPU step 04
- c9 r+ T) c: v/ F% _F000:0272 668BE0 MOV ESP,EAX
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Instruction for CPU step 05 N# a9 [2 o& x, S
F000:0275 8CC8 MOV AX,CS & K& S9 X7 c1 ~0 M+ Z
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Instruction for CPU step 063 B1 F! g7 S; e, [# m' B
F000:0277 8ED0 MOV SS,AX ( ]$ T( U! ?5 P6 Z
* R( `' c5 W: oInstruction for CPU step 076 |6 ^1 n% S, J7 R( L$ |0 m) Z3 t
F000:027C E957FE JMP near16 ptr 00d6
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Instruction for CPU step 08
% }. b, G5 C+ |6 y" f3 i/ V0 MF000:00D6 E9A601 JMP near16 ptr 027f
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Instruction for CPU step 09
4 j; Z5 u1 `' j8 gF000:027F B0D0 MOV AL,d0
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8 H4 D+ P. M% |) C* g4 ~5 U2 AInstruction for CPU step 10
" D) b4 m; e5 } U3 X) T8 NF000:0281 E680 OUT 80,AL
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Instruction for CPU step 11: J7 F( Y \. L
F000:0283 BF8902 MOV DI,0289 # E" o; n* p+ r+ S% @" I
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Instruction for CPU step 123 p! B) Z& u; f: l `. j% k( j
F000:0286 E9AE06 JMP near16 ptr 0937
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Instruction for CPU step 13
, J8 {& s8 V$ e x% f, N# ?! lF000:0937 0F08 INVD 1 @# J$ z5 h" ~- l2 B8 G
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Instruction for CPU step 14% r ^, L0 S7 f
F000:0939 0F6EFF MOVD MM7,EDI 2 H8 S* F7 k8 h1 ]# ?& s
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Instruction for CPU step 15$ {% C/ n2 U( f* o' ^0 k2 n/ ~
F000:093C 668BC4 MOV EAX,ESP ) r% \: z5 A) h) o3 p# z
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Instruction for CPU step 16
- _& _; y6 l- Z+ Z6 e2 E2 |F000:093F E97C08 JMP near16 ptr 11be8 Q, `" |# I; ^# V. d
! e( j+ V6 @; W; S8 A( h5 f5 @Instruction for CPU step 17) [8 I. W# I' ^; C6 ]
F000:11BE E981F7 JMP near16 ptr 0942
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9 T5 u3 ], ~) EInstruction for CPU step 18" ]/ m1 Q3 Z5 q" d9 M9 i
F000:0942 BF4809 MOV DI,0948 6 v' ]+ q: e9 ]5 E; }' t% a
) ^( D9 Q2 O9 m* @# }Instruction for CPU step 19
9 S, }% V4 w* A3 e. K8 G1 {F000:0945 E9C004 JMP near16 ptr 0e08" ]4 X7 r5 a0 I$ `; Y* x6 h, n$ i/ @
' {9 _8 z2 e7 K9 z9 |% HInstruction for CPU step 20
9 l& r+ c$ O! \7 zF000:0E08 0F20C0 MOV EAX,CR0
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2 E% [- [( M3 i% g& O& J+ [Instruction for CPU step 21
9 W! B2 N4 X& D7 N8 eF000:0E0B 660D00000060 OR EAX,60000000) G" ]1 v1 V4 U+ g7 ~, M
! ~, {7 a. q7 lInstruction for CPU step 221 D" C. ~0 \6 k% {
F000:0E11 0F22C0 MOV CR0,EAX
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Instruction for CPU step 233 ]* |) g8 d# H0 D( V
F000:0E14 0F09 WBINVD
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Instruction for CPU step 244 K0 T5 l+ W* `! {# F
F000:0E16 66B9FF020000 MOV ECX,000002ff# a1 b5 D) R# w- v, S3 k0 V
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Instruction for CPU step 25
7 ~" Z& K( `% t3 N/ _2 V+ u, v3 wF000:0E1C 0F32 RDMSR % I2 C' Z, H/ m8 q' }2 [
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Instruction for CPU step 26$ y, c% U' `- a9 ^* A ?
F000:0E1E 25FFF3 AND AX,f3ff ! B v6 I3 T5 h: H
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Instruction for CPU step 27
1 P5 p* `- m7 `" UF000:0E21 0F30 WRMSR & F- Z6 A: g- q; l% ?6 e
, ~7 H# Q( [* K+ L4 C0 aInstruction for CPU step 28) G; W- {" {3 o& V( z8 ]; Y
F000:0E23 0F09 WBINVD
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Instruction for CPU step 29
# X/ y/ o1 P3 p7 U- O+ U, b: ?F000:0E25 0F20E0 MOV EAX,CR4
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0 `- m0 u- K4 r* VInstruction for CPU step 30" T+ J6 Z$ w) P% \8 R0 e% T
F000:0E28 247F AND AL,7f
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Instruction for CPU step 31
: ~; K; I! ?/ jF000:0E2A 0F22E0 MOV CR4,EAX
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5 F7 Y, ~! j% p% p0 i: ?Instruction for CPU step 32% H8 e- P7 _7 Y* R2 q
F000:0E2D 0F20D8 MOV EAX,CR3
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' S6 u7 ^! o" JInstruction for CPU step 33
: S4 D' C6 i1 f6 B0 y6 A# V* ]F000:0E30 0F22D8 MOV CR3,EAX 5 [8 }* a4 s; i5 B1 T" U
1 _" |- {4 l! o: iInstruction for CPU step 34
5 I# W ?. K. H; w, nF000:0E33 FFE7 JMP DI
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Instruction for CPU step 35; n. T+ l1 y( P A
F000:0948 66B9FE000000 MOV ECX,000000fe# o& P7 Z. e4 g9 K+ ^1 x- N
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Instruction for CPU step 36
; H, [9 N, K4 ~0 t" I$ I* D/ w0 NF000:094E 0F32 RDMSR # l# o/ F% g# l5 V; N& P
6 i- J; ]$ S! R" \Instruction for CPU step 37& ]7 k3 x0 w( Y, H" C) |8 S( _. ]
F000:0950 0FB6D8 MOVZX BX,AL ; k/ J) {, |: Z
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Instruction for CPU step 38+ ]3 B+ [$ Y# G, Y h
F000:0953 6633C0 XOR EAX,EAX + S) q4 ?1 }+ z) h& y
- j& v& ~4 T0 L: B2 U1 w0 aInstruction for CPU step 39) A: n- b* Y- U6 v* L2 Q% b
F000:0956 668BD0 MOV EDX,EAX
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Instruction for CPU step 40( ~# J0 ^# O4 U5 R
F000:0959 B95002 MOV CX,0250
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0 O5 L# ^" l/ X5 MInstruction for CPU step 41
' I' l- Q; O7 T. @' S5 `" q$ @F000:095C 0F30 WRMSR ) p4 z K9 n/ ~
, ` H- U' t+ C: Y f% ?Instruction for CPU step 429 N8 i7 q4 h, v, P- N
F000:095E B95802 MOV CX,0258 : q1 n* Y7 c, {
0 } d; ^! u3 ~7 N: X0 XInstruction for CPU step 43* L' V9 p* H; u) Q
F000:0961 0F30 WRMSR
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0 H: r7 C/ G* u8 q" N, ?Instruction for CPU step 44
: s- w: }! n) T/ e8 i4 IF000:0963 B95902 MOV CX,0259 ! @2 e% s1 \3 c1 t0 ^& N4 u! x' @
1 g4 d) e9 d' c& L$ [: sInstruction for CPU step 45
0 l) {1 y5 h' R8 D- G$ ~ D% xF000:0966 0F30 WRMSR ' a% F' n& T3 R' G. J7 ~) N! y2 l
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Instruction for CPU step 46
' T. Q! U. m8 b" ~, T3 x' IF000:0968 B96802 MOV CX,0268 ; h9 V5 D1 w1 c" h/ [
0 i& v2 d. G0 P+ DInstruction for CPU step 47
1 N; X6 {; P2 a v6 d/ A& NF000:096B 0F30 WRMSR & ]4 s/ d; g% h+ r' Q; \
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Instruction for CPU step 48. v" j/ }$ S7 _, d9 {/ X1 I5 Z
F000:096D B96902 MOV CX,0269 " x/ i1 L( Q2 S" v
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Instruction for CPU step 49
* n( ?' o$ K% A& LF000:0970 0F30 WRMSR
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5 R( F7 S$ p2 U( A1 P4 Y7 VInstruction for CPU step 505 D9 H2 }1 b3 p- i! A6 u) C; N
F000:0972 B96A02 MOV CX,026a
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% Z- E2 r1 w3 S' r0 f3 [$ c9 x" |# WInstruction for CPU step 51
$ S4 R. |% x8 Z" C' v$ {F000:0975 0F30 WRMSR & D9 Q% s2 W- B! v9 z4 Y
0 z2 A' L: W8 n8 v- u3 N' @; g2 XInstruction for CPU step 52
0 C2 A# S1 t3 }9 fF000:0977 B96B02 MOV CX,026b ! N( {3 P: p8 D G0 I+ `; Z* h9 R
$ \; ], v- U. GInstruction for CPU step 53
; \2 D3 o7 }6 Z( h/ u& L. Q: SF000:097A 0F30 WRMSR - J* G- L* T6 e$ G
0 h- K% D6 J9 ^) s9 x) o$ G% VInstruction for CPU step 54
9 v: a6 i/ T5 @/ ^F000:097C B96C02 MOV CX,026c + k* K m5 Z; T( Y
2 T$ l6 L# U/ gInstruction for CPU step 55' r1 N" T& D* f, H
F000:097F 0F30 WRMSR
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Instruction for CPU step 566 }9 @1 H$ _; L$ g0 P
F000:0981 B96D02 MOV CX,026d - K$ C* \ y5 j, v. r) f9 _/ B
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Instruction for CPU step 572 B9 w8 t% H1 n% L2 z' ?$ Z
F000:0984 0F30 WRMSR
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5 m* u- t' O, Y$ vInstruction for CPU step 58/ ~" W9 M. t0 m% p5 }+ D! `, c3 z% U
F000:0986 B96E02 MOV CX,026e " A$ M' o" b4 ?8 @$ {
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Instruction for CPU step 59
& I4 i0 N1 |; Q. H5 SF000:0989 0F30 WRMSR
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Instruction for CPU step 60* X3 h5 m$ j( A5 S( J) R
F000:098B B96F02 MOV CX,026f
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~8 L# a3 h4 PInstruction for CPU step 61
" D9 Z e0 C) ~F000:098E 0F30 WRMSR
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Instruction for CPU step 62
$ O) w; g7 x5 h" z# |1 C( W0 zF000:0990 D1E3 SAL BX,1 $ w3 d8 q6 p; F7 l3 z+ c7 c
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Instruction for CPU step 63 b% ]' B7 H i5 r1 a
F000:0992 B90002 MOV CX,0200
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Instruction for CPU step 64, U7 Z- {, w1 \1 Z4 Z5 w
F000:0995 4B DEC BX
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Instruction for CPU step 65- J/ B( x0 u8 q) v2 t
F000:0996 0F30 WRMSR $ g& L6 W- @' S ?4 Z7 X6 x
8 b* V- J8 g$ T) LInstruction for CPU step 66& ?7 t" Y7 |, Q; @ c0 w# {7 T
F000:0998 41 INC CX
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7 ?# K6 j) H: n$ h* }! D) cInstruction for CPU step 67% G& F+ h( X3 V! G: G
F000:0999 0BDB OR BX,BX c j1 p* v& s$ n' b
9 B) x" U0 U/ @Instruction for CPU step 689 e/ B8 c2 v% N6 Y {5 h( I/ S' |
F000:099B 75F8 JNE short ptr 0995
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4 ]4 p; l0 k1 Y7 A; _ E; D. YInstruction for CPU step 69
3 k1 E. F' Y4 w% m. F+ D2 QF000:0995 4B DEC BX
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, {/ ]- i6 _$ x) `Instruction for CPU step 70+ v5 K( h% b2 ^' o0 ]
F000:0996 0F30 WRMSR
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Instruction for CPU step 71- I6 h, S% B( V$ I# v, I
F000:0998 41 INC CX
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& X# C4 R. J0 y( U0 {. {Instruction for CPU step 72: B- f! H8 ~ W# s+ U- t, N
F000:0999 0BDB OR BX,BX
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Instruction for CPU step 73
; v3 f2 n% G6 s0 cF000:099B 75F8 JNE short ptr 0995" J$ r; E! _1 u& V) k# Z
! x5 m# j" ]: v9 xInstruction for CPU step 743 y7 h# I7 d7 b9 j4 v' |6 {. i( Q
F000:0995 4B DEC BX . Z1 }1 [+ K' U: h G( v p
- H, A6 I7 r( E9 V- VInstruction for CPU step 75. d7 m) T! }& S
F000:0996 0F30 WRMSR
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4 W" l( Y: x6 D4 uInstruction for CPU step 76
4 k) O3 N& ]" h$ `- uF000:0998 41 INC CX
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4 J. F; U+ M- u" ?Instruction for CPU step 770 q$ n8 _- a& b+ J' C
F000:0999 0BDB OR BX,BX
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3 ~+ E2 S8 K5 X5 v; pInstruction for CPU step 788 S/ p4 h2 p4 b& ~! h
F000:099B 75F8 JNE short ptr 0995
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9 ^; q, }5 T1 A9 M2 ZInstruction for CPU step 79; f: |. _+ @5 \& R- V9 l
F000:0995 4B DEC BX ; o' p; M9 a& C: b5 `3 k# v
- A U7 p- g8 V+ ]Instruction for CPU step 80' L2 R& A9 C, d$ A# n
F000:0996 0F30 WRMSR
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/ |' g% d7 u" t8 KInstruction for CPU step 81% R6 y( J1 Q. V/ c0 g
F000:0998 41 INC CX
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Instruction for CPU step 82
. f. k1 L! t% o- Q: m4 HF000:0999 0BDB OR BX,BX % U% I8 {% B. h
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Instruction for CPU step 83
& y* f! I! J8 Q$ y( Q. G8 DF000:099B 75F8 JNE short ptr 0995: e. b0 o8 Y1 ?! {
" C7 R! D" n. F1 K' y# AInstruction for CPU step 84
4 `- Z6 d% c$ C' ~F000:0995 4B DEC BX
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Instruction for CPU step 852 o. H% N# {' B, o- D H3 c
F000:0996 0F30 WRMSR
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: e; I+ l% J4 y5 TInstruction for CPU step 86* l9 P. w' t4 K
F000:0998 41 INC CX
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Instruction for CPU step 87+ r+ ]& O* k5 ?2 Q' G/ v, L
F000:0999 0BDB OR BX,BX ( c# u% h, i; n
; k' D( q8 H, Y: O! L" n2 h, lInstruction for CPU step 88
. t$ u5 N# N0 LF000:099B 75F8 JNE short ptr 0995
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3 F8 y9 C8 _1 GInstruction for CPU step 89% b/ D2 Z3 ^( |' i* ?
F000:0995 4B DEC BX
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Instruction for CPU step 903 z* b6 O. ^# f* i
F000:0996 0F30 WRMSR
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Instruction for CPU step 91
8 f% v' A! V* a D0 DF000:0998 41 INC CX
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7 u. L7 h6 z2 ]$ w4 pInstruction for CPU step 928 v L, p# Z0 d
F000:0999 0BDB OR BX,BX ) O: [2 G" `6 T! [
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Instruction for CPU step 938 E& \% D$ V- M i$ A
F000:099B 75F8 JNE short ptr 09955 m' ~/ k F" m% l: n: `
% }1 s4 x. a9 I+ C# F; TInstruction for CPU step 94
6 v% S, s: v# Q. C% bF000:0995 4B DEC BX ; t" ]1 y( h- A) O* a
2 w- F& R+ X d, qInstruction for CPU step 95
" g6 m2 P- F1 I9 o( ~F000:0996 0F30 WRMSR $ ~) E+ y1 v! t$ H7 v0 C
3 m1 Y f$ F- e9 e- B5 N5 V6 AInstruction for CPU step 965 }1 D) b7 X5 k- K( D* B
F000:0998 41 INC CX " ?* R& T6 Y9 c% |' _" u. z
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Instruction for CPU step 97/ m, c6 v1 w" g# E
F000:0999 0BDB OR BX,BX
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6 e0 J7 @9 n. n! {& f z0 G5 TInstruction for CPU step 98( k) P4 S6 K8 a# L( i N
F000:099B 75F8 JNE short ptr 09958 c% I! ~. U* O: a) n. D |/ w
" V0 [9 C7 C- w) w. N' @Instruction for CPU step 99( @& ?4 H' X: h% I
F000:0995 4B DEC BX
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2 q, F# A4 z0 g, j& SInstruction for CPU step 1000 R& I8 X2 l- O% T
F000:0996 0F30 WRMSR
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9 I7 `7 h/ y* {1 U0 EInstruction for CPU step 101' a4 V' _, X$ |. y
F000:0998 41 INC CX
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+ \! K5 a+ \: I1 C5 u1 H& `. VInstruction for CPU step 102
4 A8 E) \' X; H" HF000:0999 0BDB OR BX,BX 4 g1 i3 ^6 k0 @8 r; q+ W2 l
$ L4 r& n5 V6 h8 B- C9 vInstruction for CPU step 103) B' A$ n# z+ [2 D2 V; J
F000:099B 75F8 JNE short ptr 09951 w8 p' t' B7 ]+ W/ y" m2 k
* y; U$ X) L. z! W. J( A4 e6 ^Instruction for CPU step 1040 r: Y; @; d) e7 T. Y
F000:0995 4B DEC BX |
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发表于 2009-5-24 16:39:29
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