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Programming Interface for Bus Master IDE Controller Revision 1.0
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This document defines a register level programming interface for a bus master ATA compatible (IDE) disk- Q# n/ r7 p* M3 X
controller that directly moves data between IDE devices and main memory. By performing the IDE data
- o# g6 U8 Z. A( Ptransfer as a bus master, the Bus Master Device offloads the CPU (no programmed IO for data transfer)( q! g5 E' K$ N/ I: b
and improves system performance in multitasking environments.
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1 e1 V% N; X$ ]Until this specification is ratified, it is solely h% g! J; B. U- c4 K* g: J% ?
owned and maintained by:
, T4 }5 m/ f1 y3 C( P1 EBrad Hosler, Intel Corporation) [( @5 X3 E5 z- F, x7 d3 ]
bwh@salem.intel.com (please comment using email)7 X: R' U' n R0 c! g
503-696-8431 |
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发表于 2010-7-14 14:53:56
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