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Programming Interface for Bus Master IDE Controller Revision 1.0
/ P' ]7 P7 u1 ]3 T6 Z0 A6 n: R" Q; j1994/05/16
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' y* W! d9 r4 B- YThis document defines a register level programming interface for a bus master ATA compatible (IDE) disk. D8 `6 o5 a6 c4 [
controller that directly moves data between IDE devices and main memory. By performing the IDE data: V+ w% w: a# T
transfer as a bus master, the Bus Master Device offloads the CPU (no programmed IO for data transfer)
# ?$ x1 U- K: q- |and improves system performance in multitasking environments.! G/ a5 Z) _4 }: V+ x5 u, Z7 j
5 m6 F( L+ w2 e3 r$ UUntil this specification is ratified, it is solely
* D s7 X' P8 Qowned and maintained by:
# f) x3 p6 A& i# w' \Brad Hosler, Intel Corporation
n7 W9 y0 d5 S" Zbwh@salem.intel.com (please comment using email): \1 q! L [) |% L+ D
503-696-8431 |
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发表于 2010-7-14 14:53:56
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