Programming Interface for Bus Master IDE Controller Revision 1.0

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Programming Interface for Bus Master IDE Controller Revision 1.0
$ C1 h- h* X: g$ U  e4 L1994/05/16
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# w1 _2 H' `8 N. ~% p! L2 OThis document defines a register level programming interface for a bus master ATA compatible (IDE) disk
# H4 R. M" i& K% W# mcontroller that directly moves data between IDE devices and main memory. By performing the IDE data
4 J. ]2 Q$ D. l! I; a3 P! S  i3 a" Ztransfer as a bus master, the Bus Master Device offloads the CPU (no programmed IO for data transfer)
and improves system performance in multitasking environments.
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Until this specification is ratified, it is solely
& E4 q# X& e! Y. Iowned and maintained by:
  Q  q4 e  R% k& I- dBrad Hosler, Intel Corporation
$ @2 Q4 {. a/ ubwh@salem.intel.com (please comment using email)
8 m8 d0 [2 r, s" L3 f' p9 X503-696-8431