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Programming Interface for Bus Master IDE Controller Revision 1.05 D. `1 p: ]# q' p
1994/05/16
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2 |- _9 `/ r( o* I; ~: S- m# wThis document defines a register level programming interface for a bus master ATA compatible (IDE) disk; ~# V$ [" v( |# E
controller that directly moves data between IDE devices and main memory. By performing the IDE data% O, x+ X$ D& p- z- f z
transfer as a bus master, the Bus Master Device offloads the CPU (no programmed IO for data transfer)2 T F6 T+ _. M. h$ j/ t: {
and improves system performance in multitasking environments.
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Until this specification is ratified, it is solely1 S/ ` ]- A3 [0 ~2 y j: K: D
owned and maintained by:+ T- g9 c5 u, `" a0 w
Brad Hosler, Intel Corporation/ D9 j& n6 |3 \( ?) F6 n0 z
bwh@salem.intel.com (please comment using email)
& D. A- N" V8 h! {2 M503-696-8431 |
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