Programming Interface for Bus Master IDE Controller Revision 1.0

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Programming Interface for Bus Master IDE Controller Revision 1.0
* q- }" ?! |4 V6 h1 l+ Y1994/05/16
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This document defines a register level programming interface for a bus master ATA compatible (IDE) disk
" t- e9 ]- n3 B: o$ i* M3 s& G: scontroller that directly moves data between IDE devices and main memory. By performing the IDE data
transfer as a bus master, the Bus Master Device offloads the CPU (no programmed IO for data transfer)
0 m9 z/ |+ G4 J2 u  Land improves system performance in multitasking environments.
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Until this specification is ratified, it is solely
owned and maintained by:
( V$ F0 b+ ]1 v" a% K5 @2 L- kBrad Hosler, Intel Corporation
bwh@salem.intel.com (please comment using email)
$ `/ L1 X" |( B  B) o6 D3 \503-696-8431