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Programming Interface for Bus Master IDE Controller Revision 1.0
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This document defines a register level programming interface for a bus master ATA compatible (IDE) disk' c0 H9 H3 H* d+ N: ?
controller that directly moves data between IDE devices and main memory. By performing the IDE data
/ t& E2 j y9 N4 F* x9 b P$ Vtransfer as a bus master, the Bus Master Device offloads the CPU (no programmed IO for data transfer)
% k2 U# @ f5 \# H% mand improves system performance in multitasking environments.
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7 h( ~3 @+ O4 l; T: e7 ZUntil this specification is ratified, it is solely% m! V$ t4 W( N ]/ ^4 D
owned and maintained by:3 }2 r2 B' _- i9 K. I+ S5 M
Brad Hosler, Intel Corporation8 L3 t! J G3 q3 J$ U# o
bwh@salem.intel.com (please comment using email)! |4 Z& X9 y7 k+ m, `
503-696-8431 |
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发表于 2010-7-14 14:53:56
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